AT86RF233 datasheet(13/225 Pages) ATMEL

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MCU Wireless AT86RF233 [PRELIMINARY DATASHEET]

Atmel-8351E-MCU_Wireless-AT86RF233_Datasheet_072014

4 General Circuit Description

The Atmel AT86RF233 single-chip radio transceiver provides a complete radio

transceiver interface between an antenna and a microcontroller. It comprises the analog

radio, digital modulation and demodulation including time and frequency

synchronization, as well as data buffering. A single 128-byte TRX buffer stores receive

or transmit data. Communication between transmitter and receiver is based on direct

sequence spread spectrum with different modulation schemes and spreading codes.

The AT86RF233 block diagram is shown in Figure 4-1.

Figure 4-1. AT86RF233 Block Diagram.

AVREG

LNA

PLL

PPF

BPF

ADC

AGC

ext. PA and Power

Control

Configuration Registers

SPI

(Slave)

RSSI

IRQ

CLKM

/RST

SLP_TR

/SEL

MISO

MOSI

SCLK

DIG3/4

RFP

RFN

TX Data

Control Logic

DIG2

Antenna Diversity

FTN, BATMON

XOSC

Analog Domain

Digital Domain

AES

DIG1/2

DVREG

RX BBP

Frame

Buffer

TX BBP

Limiter

The number of external components is minimized such that only the antenna, the

crystal and decoupling capacitors are required. The bidirectional differential antenna

pins (RFP, RFN) are used for transmission and reception, thus no external antenna

switch is needed. Control of an external power amplifier is supported by two digital

control signals (differential operation).

The received RF signal at pin 5 (RFN) and pin 6 (RFP) is differentially fed through the

low-noise amplifier (LNA) to the RF filter (PPF) to generate a complex signal, driving the

integrated channel filter (BPF). The limiting amplifier provides sufficient gain to drive the

succeeding analog-to-digital converter (ADC) and generates a digital RSSI signal. The

ADC output signal is sampled by the digital base band receiver (RX BBP).

The transmit modulation scheme is offset-QPSK (O-QPSK) with half-sine pulse shaping

and 32-length block coding (spreading) according to [1], [2] and [3]. The modulation

signal is generated in the digital transmitter (TX BBP) and applied to the fractional-N

frequency synthesis (PLL), to ensure the coherent phase modulation required for

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