SC202A datasheet(14/19 Pages) SEMTECH

14 / 19 page

SC202A

setting, optimizing efficiency for all possible load currents

in PWM or PSAVE mode. While in PSAVE mode, output

voltage regulation is controlled by a series of switching

bursts. During a burst, the inductor current is limited to a

peak value which controls the on-time of the PMOS switch.

After reaching this peak, the PMOS switch is disabled and

the inductor current decreases to near 0mA. Switching

bursts continue until the output voltage climbs to V

OUT

+2.5% or until the PSAVE current limit is reached. Switching

is then stopped to eliminate switching losses, enhancing

overall efficiency. Switching resumes when the output

voltage reaches the lower threshold of V

OUT and continues

until the upper threshold again is reached. Note that the

output voltage is regulated hysteretically while in PSAVE

mode between V

OUT and VOUT + 2.5%. The period and duty

cycle while in PSAVE mode are solely determined by V

and V

OUT until PWM mode resumes. This can result in the

switching frequency being much lower than the PWM

mode frequency.

If the output load current increases enough to cause V

OUT

to decrease below the PSAVE exit threshold (V

OUT -2%), the

device automatically exits PSAVE and operates in continu-

ous PWM mode. Note that the PSAVE high and low

threshold levels are both set at or above V

OUT to minimize

undershoot when the SC202A exits PSAVE. Figure 2 illus-

trates the transitions from PWM mode to PSAVE mode and

back to PWM mode.

VOUT -2%

VOUT

VOUT +2.5%

Load

Demand

(

IOUT)

BURST

OFF

VLX

Time

PWM Mode at

Medium/High

Load

PSAVE Mode at

Light Load

PWM Mode at

Medium/High

Load

PSAVE

EXIT

Figure 2 — Transitions Between PWM and PSAVE Modes

Applications Information (continued)

Protection Features

The SC202A provides the following protection features:

Soft-Start Operation

Over-Voltage Protection

Current Limit

Thermal Shutdown

Under-Voltage Lockout

Soft-Start

The soft-start sequence is activated after a transition from

an all zeros CTL code to a non-zero CTL code enables the

device. At start-up, the PMOS current limit is stepped

through four levels: 25%, 40%, 60%, and 100%. Each step

is maintained for 60μs following an internal reference start

up of 20μs, resulting in a total nominal start-up period of

260μs. If V

OUT reaches 90% of the target within the first 2

steps, the device continues in PSAVE mode at the end of

soft-start; otherwise, it goes into PWM mode. Note the

OUT ripple in PSAVE mode can be larger than the ripple in

PWM mode.

Over-Voltage Protection

Over-voltage protection ensures the output voltage does

not rise to a level that could damage its load. When V

OUT

exceeds the regulation voltage by 15%, the PWM drive is

disabled. Switching does not resume until V

OUT has fallen

below the regulation voltage by 2%.

Current Limit

The SC202A switching stage is protected by a current limit

function. If the output load exceeds the PMOS current

limit for 32 consecutive switching cycles, the device enters

fold-back current limit mode and the output current is

limited to approximately 150mA. Under these conditions,

the output voltage will be the product of I

FB-LIM and the load

resistance. The load must fall below I

FB-LIM for the device to

exit fold-back current limit mode. This function makes the

device capable of sustaining an indefinite short circuit on

its output under fault conditions.

Thermal Shutdown

The SC202A has a thermal shutdown feature to protect

the device if the junction temperature exceeds 160°C.

During thermal shutdown, the PMOS and NMOS switches

are both disabled, tri-stating the LX output. When the

junction temperature drops by the hysteresis value (20°C),

•

SC202A датащи(PDF) 14 Page - Semtech Corporation

SC202A датащи(HTML) 14 Page - Semtech Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

датащи скачать

ссылки URL