HT6230 datasheet(6/8 Pages) HOLTEK

6 / 8 page

HT6230

April 19, 2000

logic 1. If the sense input comes from XIN, the

corresponding command code together with

the system code stored in the system latches

are generated.

· Two-key system mode

The device goes into this mode by switching

the MS input pin to high state. The pull-high

resistors are only connected to XIN inputs ex-

cept the first scan cycle. In the first scan cycle,

there only exists pull-high resistors in ZIN in-

puts. In this mode, the legal key operation is

that exactly one XIN and one ZIN are con-

nected to two DRS drivers. In the first scan

duration, it detects which key in Z-key matrix

is pressed and generates an enable signal to

latch the system latches. While in the second

scan duration, it detects which key in the

X-key matrix is pressed and generates an en-

abled signal to latch the command latches. Af-

ter being latched, the system and command

codes are transmitted.

Control bit

A control bit is added after two start bits and

will be complemented if one key is released. The

decoder can decide whether the next code is a

new command or not.

Oscillator

The embedded part of the oscillator is an

RC-oscillation circuit. The OSC pin is the input

terminal of the RC-oscillation circuit and is con-

nected to an external ceramic resonator (429kHz).

A resistor of 6.8kW must be in series with the

resonator. The resonator and resistor are

grounded at one side.

Reset (after key release)

In a complete code repetition time, as shown in

the figure below, the following situation of key

release results in a reset action.

· During Tsep and debounce time, the device

will reset immediately if a key is released.

· During Scan cycle in Tcode, a reset will occur

if a key is released in three cases described be-

low:

¨ When one of the key scan drivers is in the

low state

¨ Before that key has been detected

¨ When MS is high and there is no wired con-

nection in Z-key matrix

Test pins (TT1 and TT2)

There are four modes by the combination of TT1

and TT2.

TT1 TT2

Mode

Normal mode

Reset

Test mode 1

Test mode 2

C ode 1

C ode 2

Tc o d e

R epet i t i o n t i m e

Ts e p

D ebounc e

ti m e

Tc o d e

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