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HT6221 датащи(PDF) 6 Page - Holtek Semiconductor Inc |
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HT6221 датащи(HTML) 6 Page - Holtek Semiconductor Inc |
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6 / 13 page ![]() HT6221/HT6222 6 March 2, 2000 When one of the keys (32 or 64 keys) is triggered for over 36ms, the oscillator is enabled and the chip is activated. If the key is pressed and held for 108ms or less, the 108ms transmission codes are enabled and comprised of a header code (9ms), an off code (4.5ms), low byte address codes (9ms~18ms), high byte address codes (9ms~18ms), 8-bit data codes (9ms~18ms), and the inverse codes of the 8-bit data codes (18ms~9ms). After the pressed key is held for 108ms, if the key is still held down, the trans- mission codes turn out to be a composition of header (9ms) and off codes (2.5ms) only. To avoid mistakes made by keyboard scanning or simultaneous two-key inputs (except for the three double-key active functions (K21+K22, K21+K23, and K21+K24), the HT6221/HT6222 are facilitated with 36ms starting time. The HT6221/HT6222 also provide three dou- ble-key active functions (K21+K22, K21+K23, and K21+K24) for tape deck recording opera- tions. The double-key operation rules are shown in timing 4 and timing 6. Transmission codes The transmission codes of the HT6221/6222 consist of a 9ms header code, a 4.5ms off code, 16-bit ad- dress codes (18ms~36ms), 9ms~18ms 8-bit data codes, and the inverse code of the 8-bit data codes. The following is an illustration of the transmission codes: DO UT X2 Ke y - i n ( K 1~ K 64) 36m s m i n. 9m s 45 m s ~ 6 3 m s 10 8m s 10 8m s ( A 0~ A 1 5+ D 0 ~ D 7+ D 0 ~ D 7 ) 3 8 kH z, 33 % dut y c a r r i er 9m s 2. 5 m s 2. 5 m s 9m s Ke y En a b l e s F o sc = 4 5 5 kH z 4. 5 m s 0. 56 m s 0. 56 m s Output format for the DOUT Ca r r i e r 26 . 3 m s 8. 77m s 38k H z 38kHz carrier "O n e " " Z er o" dat a per i o d ( 1 . 12m s ) dat a per i o d ( 2 . 24m s ) 38k H z c ar r i er 38k H z c ar r i er 0. 56 m s Logic states The output code carrier of the DOUT pin is shown in Timing 2: The transmission codes employ the PPM (Pulse Position Modulation) method to represent their two logic states by "0" (1.12ms) and "1" (2.24ms) as shown in Timing 3: |
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