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ADP150 датащи(PDF) 3 Page - Analog Devices |
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ADP150 датащи(HTML) 3 Page - Analog Devices |
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3 / 5 page ![]() Circuit Note CN-0134 Rev. B | Page 3 of 5 Table 2. ADF4350 RF Output Filter Component Values (DNI = Do Not Insert) Frequency Range (MHz) ZBIAS L1 (nH) L2 (nH) C1a (pF) C1c (pF) C2a (pF) C2c (pF) C3a (pF) C3c (pF) a. 500–1300 27 nH|| 50 Ω 3.9 3.9 DNI 4.7 DNI 5.6 DNI 3.3 b. 850–2450 19 nH || (100 Ω in position C1c) 2.7 2.7 3.3 100 Ω 4.7 DNI 3.3 DNI c. 1250–2800 50 Ω 0 Ω 3.6 DNI DNI 2.2 DNI 1.5 DNI d. 2800–4400 3.9 nH 0 Ω 0 Ω DNI DNI DNI DNI DNI DNI The ADF4350 output match consists of the ZBIAS pull-up and, to a lesser extent, the decoupling capacitors on the supply node. To get a broadband match it is recommended to use either a resistive load (ZBIAS = 50 Ω) or a resistive in parallel with a reactive load for ZBIAS. The latter gives slightly higher output power, depending on the inductor chosen. Note that it is possible to place the parallel resistor as a differential component (i.e. 100 Ω) in position C1c to minimize board space. This is done in filter type c, described in Table 2. The filter should be designed with a cutoff approximately 1.2 to 1.5 times the highest frequency in the band of interest. This allows margin in the design, as typically the cutoff will be lower than designed due to parasitics. The effect of PCB parasitics can be simulated in an EM simulation tool for improved accuracy. ADF4350 13 RFOUTA+ 12 RFOUTA– ADL5375 9 LOIP 10 LOIN L1 L2 1nF L1 L2 1nF C1a C1a C1c C2a C2a C2c C3a C3a C3c ZBIAS ZBIAS 120pF 120pF 0.1µF 3.3V Figure 3. ADF4350 RF Output Filter Schematic As can be seen from Table 2, at lower frequencies below 1250 MHz, a 5th order filter is required. For 1.25 GHz to 2.8 GHz, 3rd order filtering is sufficient. For frequencies above 2.8 GHz, no filtering is required, as the harmonic levels are sufficiently low to meet sideband suppression specifications. 0 –70 –60 –50 –40 –30 –20 –10 800 1000 1200 1400 1600 1800 2000 2200 2400 FREQUENCY (MHz) NO FILTERING FILTER B: 850MHz TO 2450MHz Figure 4. Sideband Suppression for Filter b, 850 MHz to 2450 MHz Q I ERROR VECTOR MEASURED SIGNAL PHASE ERROR (I/Q ERROR PHASE) MAGNITUDE ERROR (I/Q ERROR PHASE) IDEAL SIGNAL (REFERENCE) 0 Figure 5. EVM Plot A sweep of sideband suppression vs. frequency is shown in Figure 4 for the circuit using Filter b (850 MHz to 2450 MHz). In this sweep, the test conditions were the following: baseband I/Q amplitude = 1 V p-p differential sine waves in quadrature with a 500 mV (ADL5375-05) dc bias; baseband I/Q frequency (fBB) = 1 MHz. |
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