AS3709 datasheet(23/74 Pages) AMSCO

номер детали	AS3709

подробное описание детали	關PMIC with 5 DCDC and 2 LDOs

PDF	74 Pages

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производитель	AMSCO [ams AG]

домашняя страница	http://www.ams.com

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23 / 74 page

ams Datasheet, Confidential: 2013-Aug [1-02]

AS3709 – 23

Detaile d Desc ri p t ion - P o w e r M a nagemen t Fu nc tions

Figure 30:

Universal IO LDO Electrical Characteristics

Low Power LDO V2_5 Regulator

The low power LDO V2_5 is needed to supply the chip core

(analog and digital) of the device. It is designed to get the

lowest possible power consumption and still offering

reasonable characteristics. To ensure high PSRR and stability, a

low-ESR ceramic capacitor of min. 0.7μF must be connected to

the output.

Parameter

Figure 31:

Low Power V2_5 LDO Electrical Characteristics

Figure 32:

Universal IO LDO Electrical Characteristics

Symbol

Parameter

Note

Min

Typ

Max

Unit

COUT_LDOx

Output Capacitor

Ceramic X5R or X7R

0.7

2.2

μF

CVIN_LDOx

Input Capacitor

Ceramic X5R or X7R

2.2

μF

Symbol

Parameter

Note

Min

Typ

Max

Unit

Supply Voltage Range

See VSUP

VOUT

Output Voltage

2.4

2.5

2.6

RON

On resistance

Guaranteed by design

IOFF

Shut down current

100

Quiescent Current

Guaranteed by design,

consider chip internal

load for measurements

3μA

tSTART

Startup time

200

μs

Symbol

Parameter

Note

Min

Typ

Max

Unit

CV2_5

Output Capacitor

Ceramic X5R or X7R

0.7

μF

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