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ADS7882IPFBT датащи(PDF) 10 Page - Texas Instruments |
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ADS7882IPFBT датащи(HTML) 10 Page - Texas Instruments |
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10 / 30 page ![]() D11−4 & D3−0 D3−0 Conversion No N Data For Conv. N Data For Conv. N−1 CS CONVST BUSY D11−D0 td1 + t(acq) BYTE t2 td10 td7 td8 td2 DEVICE OPERATION AND DATA READ IN BACK-TO-BACK CONVERSION Sample N Conversion N Data For Conversion N−1 (Data Read without Latency) CONVST BUSY D11−D0 t(conv) + td11 tw4 tw5 t(acq) td12 t0 = 333 ns for 3 MSPS Operation ADS7882 SLAS630 – DECEMBER 2008 ........................................................................................................................................................................................... www.ti.com Figure 6. Read Control Via CS and RD Tied to BDGND Figure 7 and Figure 8 illustrate device operation in back-to-back conversion mode. It is possible to operate the device at any throughput in this mode, but this is the only mode in which the device can be operated at throughputs exceeding 2.83 MSPS (1/t(acq) min + t(conv) max + td11 max)). A conversion starts on the CONVST falling edge. The BUSY output goes high after a delay (td2). Note that care must be taken not to abort the conversion (see Figure 4) apart from timing restrictions shown in Figure 7 and Figure 8. The conversion ends within the conversion time, t(conv), after the CONVST falling edge. The new acquisition can be immediately started without waiting for the BUSY signal to go low. This can be ensured with a CONVST high pulse width that is more than or equal to (t0 – t(conv) + 10 nsec) which is tw4 for a 3-MHz operation. Figure 7. Back-To-Back Operation With CS and RD Low 10 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): ADS7882 |
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