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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AMC7832IPAPR датащи(PDF) 38 Page - Texas Instruments |
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AMC7832IPAPR датащи(HTML) 38 Page - Texas Instruments |
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38 / 70 page  GPIOn ENABLE GPIOn Bit (when reading) GPIOn Bit (when writing) IOVDD 48k AMC7832 SLAS836 – MARCH 2014 www.ti.com 8.3.5 General Purpose I/Os The AMC7832 includes eight General Purpose I/O (GPIO) terminals, each with an internal 48-k Ω pull-up resistor to IOVDD. The GPIO[0-3] terminals have dual functionality and can be programmed as either bidirectional digital I/O terminals or interrupt signals in the GPIO Configuration register (address 0x12). The GPIO[4-7] terminals are dedicated GPIOs. Table 4. Dual Functionality GPIO Pins PIN DEFAULT PIN NAME ALTERNATIVE PIN NAME ALTERNATIVE FUNCTIONALITY 9 GPIO0 ALARMIN DAC clear control signal. 10 GPIO1 ALARMOUT Global alarm output. 11 GPIO2 ADCTRIG External ADC conversion trigger. 12 GPIO3 DAV ADC data available indicator. The GPIOs can receive an input or produce an output. When the GPIO acts as an output its status is determined by the corresponding GPIO bit in the GPIO Register (address 0x7A). To use a GPIO terminal as an input, the corresponding GPIO bit in the GPIO Register must be set to '1'. When a GPIO terminal acts as input, the digital value on the terminal is acquired by reading the corresponding GPIO bit. After a power-on reset or any forced reset, all GPIO bits are set to '1', and the GPIO terminals have a 48-k Ω input impedance to IOVDD. Figure 52. AMC7832 GPIO Pin 38 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: AMC7832 |
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