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LT3791-1

37911fa

For more information www.linear.com/LT3791-1

Efficiency Considerations

The power efficiency of a switching regulator is equal to

the output power divided by the input power times 100%.

It is often useful to analyze individual losses to determine

what is limiting the efficiency and which change would

produce the most improvement. Although all dissipative

elements in circuits produce losses, four main sources

account for most of the losses in LT3791-1 circuits:

1. DC I2R losses. These arise from the resistances of the

MOSFETs, sensing resistor, inductor and PC board

traces and cause the efficiency to drop at high output

currents.

2. Transition loss. This loss arises from the brief amount

of time switch M1 or switch M3 spends in the saturated

region during switch node transitions. It depends upon

the input voltage, load current, driver strength and

MOSFET capacitance, among other factors. The loss

is significant at input voltages above 20V and can be

estimated from:

Transition Loss ≈ 2.7 • VIN2 • IOUT • CRSS • f

where CRSS is the reverse-transfer capacitance.

3. INTVCC current. This is the sum of the MOSFET driver

and control currents.

4. CIN and COUT loss. The input capacitor has the difficult

job of filtering the large RMS input current to the regu-

lator in buck operation. The output capacitor has the

difficult job of filtering the large RMS output current

in boost operation. Both CIN and COUT are required to

have low ESR to minimize the AC I2R loss and sufficient

capacitance to prevent the RMS current from causing

additional upstream losses in fuses or batteries.

5. Other losses. Schottky diode D3 and D4 are respon-

sible for conduction losses during dead time and light

load conduction periods. Inductor core loss occurs

predominately at light loads. Switch M3 causes reverse

recovery current loss in boost operation.

When making adjustments to improve efficiency, the input

current is the best indicator of changes in efficiency. If you

make a change and the input current decreases, then the

efficiency has increased. If there is no change in the input

current, then there is no change in efficiency.

PC Board Layout Checklist

The basic PC board layout requires a dedicated ground

plane layer. Also, for high current, a multilayer board

provides heat sinking for power components.

ThePGNDgroundplanelayershouldnothaveanytraces

and it should be as close as possible to the layer with

power MOSFETs.

Place CIN,switchM1,switchM2andD1inonecompact

area. Place COUT, switch M3, switch M4 and D2 in one

compact area.

Use immediate vias to connect the components (in-

cluding the LT3791-1’s SGND and PGND pins) to the

ground plane. Use several large vias for each power

component.

Use planes for VIN and VOUT to maintain good voltage

filtering and to keep power losses low.

Floodallunusedareasonalllayerswithcopper.Flooding

with copper will reduce the temperature rise of power

components. Connect the copper areas to any DC net

(VIN or PGND).

Separatethesignalandpowergrounds.Allsmall-signal

componentsshouldreturntotheSGNDpinatonepoint,

which is then tied to the PGND pin close to the sources

of switch M2 and switch M3.

Place switch M2 and switch M3 as close to the control-

ler as possible, keeping the PGND, BG and SW traces

short.

Keep the high dV/dT SW1, SW2, BST1, BST2, TG1 and

TG2 nodes away from sensitive small-signal nodes.

applicaTions inForMaTion

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