MB40C348 datasheet(3/19 Pages) FUJITSU

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MB40C348

s PIN DESCRIPTION

Note: The values in parentheses are standard.

(Continued)

Pin No.

Symbol

Description

9, 23, 47,

79, 107

AVDD

Analog power supply (

+3.3 V)

28, 38, 50,

59, 70, 82,

93, 106

DVDD

Digital power supply (

+3.3 V)

116, 119

PVDD

PLL power supply (

+3.3 V)

VESD

Digital input power supply for protect device (

+3.3 V or +5 V)

10, 22, 48,

80, 91, 108

AVSS

Analog power supply ground pin (0 V)

27, 37, 49,

60, 69, 81,

92, 105

DVSS

Digital power supply ground pin (0 V)

114, 120

PVSS

PLL power supply ground pin (0 V)

RVIN

GVIN

BVIN

1.9 double Amp. input pin

RADIN

GADIN

BADIN

A/D converter input pin

Please set these pins to open usually.

RVCLP

GVCLP

BVCLP

Clamp voltage setting input pin

110

VRTM

Reference voltage output pin on top side

111

VRT

Reference voltage input pin on top side

112

VREFT

Reference voltage generator output pin on top side

VRBM

Reference voltage output pin on bottom side

VRB

Reference voltage input pin on bottom side

VREFB

Reference voltage generator output pin on bottom side

109

VR1

VR2

VR3

Reference 1/4 voltage output pin (Add 0.1

µF for AVSS)

Reference 1/2 voltage output pin (Add 0.1

µF for AVSS)

Reference 3/4 voltage output pin (Add 0.1

µF for AVSS)

DSEL

Mode of operation setting input pin (Refer to s MODE SETTING)

Serial data transfer clock input pin

DATA

Serial data input pin

Chip select signal input pin

It is possible to input to the shift register at CS falling

The content of the shift register is executed at CS rising

EXCLK

Clock input pin for A/D converter (CMOS level)

Fix to “L” level when unused.

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