LP3971 datasheet(6/57 Pages) TI1

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LP3971

SNVS432U – JANUARY 2006 – REVISED OCTOBER 2008

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Pin Descriptions (continued)

Pin #

Name

I/O

Type

Description

Input Digital enable pin for the high voltage power domain supplies. Output from

SYS_EN

the Monahans processor.

Digital enable pin for the Low Voltage domain supplies. Output signal from the

PWR_EN

Monahans processor

PGND1

Buck1 NMOS Power Ground

SW1

PWR

Buck1 Switcher output

VIN Buck1

PWR

Battery input power to Buck1

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings

(1)

All Inputs

−0.3V to +6.5V

GND to GND SLUG

±0.3V

Junction Temperature (TJ-MAX)

150°C

Storage Temperature

−65°C to +150°C

Power Dissipation

(TA = 70°C)

(2)

3.2W

Junction-to-Ambient Thermal

Resistance

θJA

(2)

25°C/W

Maximum Lead Temp (Soldering)

260°C

ESD Rating (3)

Human Body Model

2 kV

Machine Model

200V

(1)

Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which

operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits

and associated test conditions, see the Electrical Characteristics tables.

(2)

In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may

have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-

OP = 125°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance

of the part/package in the application (

θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA x PD-MAX).

(3)

The Human body model is a 100 pF capacitor discharged through a 1.5 k

Ω resistor into each pin. (MIL-STD-883 3015.7) The machine

model is a 200 pF capacitor discharged directly into each pin. (EAIJ)

Operating Ratings

VIN LDO 4,5

2.7V to 5.5V

VEN

1.74 to (VIN

Junction Temperature (TJ)

−40°C to +125°C

Operating Temperature (TA)

−40°C to +85°C

Maximum Power Dissipation

(TA = 70°C)

(1) (2)

2.2W

(1)

In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may

have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-

OP = 125°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance

of the part/package in the application (

θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA x PD-MAX).

(2)

Junction-to-ambient thermal resistance (

θJA) is taken from a thermal modeling result, performed under the conditions and guidelines set

forth in the JEDEC standard JESD51–7. The test board is a 4-layer FR-4 board measuring 102 mm x 76 mm x 1.6 mm with a 2x1 array

of thermal vias. The ground plane on the board is 50 mm x 50 mm. Thickness of copper layers are 36 µm/1.8 µm/18 µm/36 µm (1.5 oz/1

oz/1 oz/1.5 oz). Ambient temperature in simulation is 22°C, still air. Power dissipation is 1W. Junction-to-ambient thermal resistance is

highly application and board-layout dependent. In applications where high maximum power dissipation exists, special care must be paid

to thermal dissipation issues in board design. The value of

θJA of this product can vary significantly, depending on PCB material, layout,

and environmental conditions. In applications where high maximum power dissipation exists (high VIN, high IOUT), special care must be

paid to thermal dissipation issues. For more information on these topics, please refer to Application Note 1187: Leadless Leadframe

Package (LLP) and the Power Efficiency and Power Dissipation section of this datasheet.

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