LM5113

www.ti.com

SNVS725E – JUNE 2011 – REVISED JANUARY 2012

(4)

There are some additional losses in the gate drivers due to the internal CMOS stages used to buffer the LO and

HO outputs. The following plot shows the measured gate driver power dissipation versus frequency and load

capacitance. At higher frequencies and load capacitance values, the power dissipation is dominated by the

power losses driving the output loads and agrees well with the above equations. This plot can be used to

approximate the power losses due to the gate drivers.

Figure 18. Neglecting Bootstrap Diode Losses

Gate Driver Power Dissipation (LO+HO)

VDD=+5V,

The bootstrap diode power loss is the sum of the forward bias power loss that occurs while charging the

bootstrap capacitor and the reverse bias power loss that occurs during reverse recovery. Since each of these

events happens once per cycle, the diode power loss is proportional to the operating frequency. Larger

capacitive loads require more energy to recharge the bootstrap capacitor resulting in more losses. Higher input

The following two plots illustrate the forward bias power loss and the reverse bias power loss of the bootstrap

diode respectively. The plots are generated based on calculations and lab measurements of the diode reverse

time and current under several operating conditions. The plots can be used to predict the bootstrap diode power

loss under different operating conditions.

Figure 19. Forward Bias Power Loss of

The Load of High-Side Driver is a GaN FET

with Total Gate Charge of 10nC

Copyright © 2011–2012, Texas Instruments Incorporated

Submit Documentation Feedback

13

Product Folder Links: LM5113