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STM32L151C6U6 датащи(PDF) 86 Page - STMicroelectronics |
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STM32L151C6U6 датащи(HTML) 86 Page - STMicroelectronics |
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86 / 131 page ![]() Electrical characteristics STM32L151x6/8/B, STM32L152x6/8/B 86/131 DocID17659 Rev 9 Figure 20. Recommended NRST pin protection 1. The reset network protects the device against parasitic resets. 2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in Table 45. Otherwise the reset will not be taken into account by the device. Table 45. NRST pin characteristics Symbol Parameter Conditions Min Typ Max Unit VIL(NRST)(1) 1. Guaranteed by design, not tested in production. NRST input low level voltage - - - 0.8 V VIH(NRST)(1) NRST input high level voltage - 1.4 - VOL(NRST)(1) NRST output low level voltage IOL = 2 mA 2.7 V < VDD < 3.6 V -- 0.4 IOL = 1.5 mA 1.65 V < VDD < 2.7 V -- Vhys(NRST)(1) NRST Schmitt trigger voltage hysteresis -- 10%VDD(2) 2. 200 mV minimum value mV RPU Weak pull-up equivalent resistor(3) 3. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution to the series resistance is around 10%. VIN = VSS 30 45 60 k Ω VF(NRST)(1) NRST input filtered pulse - - - 50 ns VNF(NRST)(1) NRST input not filtered pulse - 350 - ns ai17854 STM32Lxx RPU NRST(2) VDD Filter Internal reset 0.1 μF External reset circuit(1) |
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