4D SYSTEMS

PICASO Processor

© 2012 4D SYSTEMS

Page 6 of 23

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I = Input, O = Output, P = Power, A = Analogue

PICASO Processor Pin Out (continued…)

Pin

Symbol

I/O Description

11

D5

I/O

Display Data Bus bit 5.

12

D4

I/O

Display Data Bus bit 4.

13

D3

I/O

Display Data Bus bit 3.

14

D2

I/O

Display Data Bus bit 2.

15

D1

I/O

Display Data Bus bit1.

16

D0

I/O

Display Data Bus bit 0.

17

D6

I/O

Display Data Bus bit 6.

18

D7

I/O

Display Data Bus bit 7.

21

D8

I/O

Display Data Bus bit 8.

22

D9

I/O

Display Data Bus bit 9.

23

D10

I/O

Display Data Bus bit 10.

24

D11

I/O

Display Data Bus bit 11.

27

D12

I/O

Display Data Bus bit 12.

28

D13

I/O

Display Data Bus bit 13.

29

D14

I/O

Display Data Bus bit 14.

30

D15

I/O

Display Data Bus bit 15.

31

RX1

I

Asynchronous Serial port COM1 receive pin, RX1. Connect this pin to external

serial device Transmit (Tx) signal. This pin is 5.0V tolerant.

32

TX1

O

Asynchronous Serial port COM1 transmit pin, TX1. Connect this pin to

external serial device receive (Rx) signal. This pin is 5.0V tolerant.

33

TX0

O

Asynchronous Serial port Transmit pin, TX. Connect this pin to host micro-

controller Serial Receive (Rx) signal. The host receives data from PICASO via

this pin. This pin is 5.0V tolerant.

34

RX0

I

Asynchronous Serial port Receive pin, RX. Connect this pin to host micro-

controller Serial Transmit (Tx) signal. The host transmits data to PICASO via

this pin. This pin is 5.0V tolerant.

35

RES

O

Display RESET. PICASO initialises the display by strobing this pin LOW.

Connect this pin to the Reset (RES) signal of the display.

36

SDA

I/O

I2C Data In/Out.

37

SCL

O

I2C Clock Output.

39

CLK1

I

Device Clock input 1 of a 12MHz crystal.

40

CLK2

O

Device Clock input 2 of a 12MHz crystal.

42

BUS6

I/O

General Purpose Parallel I/O BUS(0..7), bit 6. This pin is 5.0V tolerant.

43

BUS7

I/O

General Purpose Parallel I/O BUS(0..7), bit 7. This pin is 5.0V tolerant.

44

IO5/BUS_WR

I/O

General Purpose IO5 pin. Also used for BUS_WR signal to write and latch the

data to the parallel GPIO BUS(0..7).

45

AUDENB

O

Audio Enable. Connect this pin to amplifier control.

LOW: Enable external Audio amplifier.

HIGH : Disable external Audio amplifier.

46

AUDIO

O

Pulse Width Modulated (PWM) Audio output. Connect this pin to a 2 stage

low pass filter then into an audio amplifier.

47

XL

O

4-Wire Resistive Touch Screen Left signal. Connect this pin to XL or X- signal

of the touch panel.

48

YD

O

4-Wire resistive touch screen bottom signal. Connect this pin to YD or Y-

signal of the touch panel.

49

DCENB

O

DC-DC high voltage enable signal. This maybe the high voltage that drives the

LCD backlight or the OLED panel supply.

High: Enable DC-DC converter.

Low : Disable DC-DC converter.

50

BUS0

I/O

General Purpose Parallel I/O BUS(0..7), bit 0. This pin is 5.0V tolerant.

51

BUS1

I/O

General Purpose Parallel I/O BUS(0..7), bit 1. This pin is 5.0V tolerant.