14

AT45DB321D [DATASHEET]

3597T–DFLASH–11/2013

Figure 7-3. Program Sector Protection Register

7.1.3

Read Sector Protection Register Command

To read the sector protection register, the CS pin must first be asserted. Once the CS pin has been asserted, an opcode of 32H

and three dummy bytes must be clocked in via the SI pin. After the last bit of the opcode and dummy bytes has been clocked in,

any additional clock pulses on the SCK pins will result in data for the content of the sector protection register being output on the

SO pin. The first byte corresponds to sector 0 (0a, 0b), the second byte corresponds to sector 1, and the last byte (byte 64)

corresponds to sector 63. Once the last byte of the sector protection register has been clocked out, any additional clock pulses

will result in undefined data being output on the SO pin. The CS pin must be deasserted to terminate the read sector protection

register operation and put the output into a high-impedance state.

Table 7-6.

Read Sector Protection Register Command

Command

Byte 1

Byte 2

Byte 3

Byte 4

Note:

xx = Dummy byte

Figure 7-4. Read Sector Protection Register

7.1.4

Various Aspects About the Sector Protection Register

The sector protection register is subject to a limit of 10,000 erase/program cycles. Users are encouraged to carefully evaluate

the number of times the sector protection register will be modified during the course of the application’s life cycle. If the

application requires the sector protection register to be modified more than the specified limit of 10,000 cycles because the

application needs to temporarily unprotect individual sectors (sector protection remains enabled while the sector protection

register is reprogrammed), then the application will need to limit this practice. Instead, a combination of temporarily unprotecting

individual sectors, along with disabling sector protection completely, will need to be implemented by the application to ensure

that the limit of 10,000 cycles is not exceeded.

Data byte

n

Opcode

byte 1

Opcode

byte 2

Opcode

byte 3

Opcode

byte 4

Data byte

n + 1

Data byte

n + 63

CS

Each transition

represents 8 bits

SI

Read sector protection register

32H

xxH

xxH

xxH

Opcode

X

X

X

Data byte

n

Data byte

n + 1

CS

Data byte

n + 63

SI

SO

Each transition

represents 8 bits