AT25DF641A datasheet(13/58 Pages) ETC2

13 / 58 page

AT25DF641A [DATASHEET]

8793D–DFLASH–5/2013

The three address bytes and at least one complete byte of data must be clocked into the device before the CS pin is

deasserted, and the CS pin must be deasserted on even byte boundaries (multiples of eight bits); otherwise, the device

will abort the operation and no data will be programmed into the memory array. In addition, if the address specified by

A23-A0 points to a memory location within a sector that is in the protected state (see “Protect Sector” on page 23) or

locked down (see “Sector Lockdown” on page 29), then the Byte/Page Program command will not be executed, and the

device will return to the idle state once the CS pin has been deasserted. The WEL bit in the Status Register will be reset

back to the Logical 0 state if the program cycle aborts due to an incomplete address being sent, an incomplete byte of

data being sent, the CS pin being deasserted on uneven byte boundaries, or because the memory location to be

programmed is protected or locked down.

While the device is programming, the Status Register can be read and will indicate that the device is busy. For faster

throughput, it is recommended that the Status Register be polled rather than waiting the tBP or tPP time to determine if the

data bytes have finished programming. At some point before the program cycle completes, the WEL bit in the Status

The device also incorporates an intelligent programming algorithm that can detect when a byte location fails to program

properly. If a programming error arises, it will be indicated by the EPE bit in the Status Register.

Figure 8-1. Byte Program

Figure 8-2. Page Program

SCK

MSB

00000010

410 11

812

37 38

31 32

29 30

Opcode

High-impedance

AAAA

AAA

MSB

DDDDDDDD

Address Bits A23-A0

Data In

SCK

MSB

00000010

839

37 38

31 32

29 30

Opcode

High-impedance

AAA

MSB

DDDDDDDD

Address Bits A23-A0

Data In Byte 1

MSB

DDDDDDDD

Data In Byte n

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