Product Specification

PE4259

Page 2 of 11

©2005-2012 Peregrine Semiconductor Corp. All rights reserved.

Document No. 70-0134-10 │ UltraCMOS™ RFIC Solutions

Notes: 1. Device linearity will begin to degrade below 10 MHz.

2. The DC transient at the output of any port of the switch when the control voltage is switched from Low to High or High to Low in a 50 Ω test

set-up, measured with 1ns risetime pulses and 500 MHz bandwidth.

3. A tuning capacitor must be added to the application board to optimize the insertion loss and return loss performance. See Figure 6 for

details.

Parameter

Conditions

Minimum

Typical

Maximum

Units

10 MHz

3000

MHz

1000 MHz

2000 MHz

0.35

0.50

0.45

0.60

dB

dB

Isolation

1000 MHz

2000 MHz

29

19

30

20

dB

dB

1000 MHz

2000 MHz

21

24

22

27

dB

dB

‘ON’ Switching Time

50% CTRL to 0.1 dB of final value, 1 GHz

1.50

us

‘OFF’ Switching Time

50% CTRL to 25 dB isolation, 1 GHz

1.50

us

15

Input 1 dB Compression

1000 MHz @ 2.3 - 3.3V

1000 MHz @ 1.8 - 2.3V

2500 MHz @ 2.3 - 3.3V

2500 MHz @ 1.8 - 2.3V

31.5

29.5

28.5

28

33.5

30.5

30.5

29

dBm

Input IP3

1000 MHz, 20dBm input power

55

dBm

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