PBL 386 50/2

13

Figure 12. Single-channel subscriber line interface with PBL 386 50/2 and combination CODEC/filter.

RESISTORS: (Values according to IEC E96 series)

R

SG

= 0

Ω

1% 1/10 W

R

LD

= 49.9 k

Ω

1% 1/10 W

R

OV

= User programmable

R

LC

= 32.4 k

Ω

1% 1/10 W

R

REF

= 49.9 k

Ω

1% 1/10 W

R

R

= 11.5 k

Ω

1% 1/10 W

R

T

= 52.3 k

Ω

1% 1/10 W

R

TX

= 32.4 k

Ω

1% 1/10 W

R

B

= 57.6 k

Ω

1% 1/10 W

R

RX

= 52.3 k

Ω

1% 1/10 W

R

FB

Depending on CODEC / filter

R

1

= 604 k

Ω

1% 1/10 W

R

2

= 604 k

Ω

1% 1/10 W

R

3

= 249 k

Ω

1% 1/10 W

R

4

= 280 k

Ω

1% 1/10 W

R

RT

= 330

Ω

5% 2 W

R

≥ 10 Ω

1% 1/10 W (Note 1)

R

= Line resistor, 40

Ω 1% match

CAPACITORS: (Values according to IEC E96 series)

C

VB

= 100 nF

100 V 10%

C

VB2

= 150 nF

100 V 10%

C

VCC

= 100 nF

10 V 10%

C

TC

= 2.2 nF

100 V 10%

C

RC

= 2.2 nF

100 V 10%

C

HP

= 47 nF

100 V 10%

C

LP

= 150 nF

100 V 10%

C

TX

= 68 nF

10 V 10%

C

GG

= 220 nF

100 V 10%

C

1

= 330 nF

63 V 10%

C

2

= 330 nF

63 V 10%

DIODES:

D

VB

= 1N4448

D

VB2

= 1N4448

D

BB

= 1N4448

= 1N4448 (Note 2)

OVP:

Secondary protection ( e.g. Power

Innovations TISPPBL2). The ground

terminals of the secondary protection should

be connected to the common ground on the

Printed Board Assembly with a track as

short and wide as possible, preferable a

groundplane.

hook and 1.3 V

R

and AGND, the overhead voltage can be

set to higher values, typical values can

be seen in figure 11. The R

corresponding V

are typical values for THD <1% and the

signal frequency 1000Hz.

Observe that the 4-wire output terminal

V

if the gain 2-wire to 4-wire is -6.02dB,

6.4 V

side. Signal levels between 6.4 and

12.8 V

dled with the PTG shorted so that the gain

G

the 2-wire impedance, R

4-wire gain has to be recalculated if the

PTG is shorted.

Please note that the maximum signal

current at the 2-wire side can not be

greater than 29 mA.

How to use POV:

1. Decide what overhead voltage(V

needed. The POV function is only

needed if the overhead voltage exceeds

3.2 V

Peak

2. In figure 11 the corresponding R

the decided V

3. If the overhead voltage exceeds

6.4 V

gain has to be

changed to -12.04dB by connecting

the PTG pin to AGND. Please note

that the two-wire impedance, R

the 4-wire to 4-wire gain has to be

recalculated.

Analog Temperature Guard

The widely varying environmental

conditions in which SLICs operate may

lead to the chip temperature limitations

being exceeded. The PBL 386 50/2 SLIC

reduce the dc line current when the chip

temperature reaches approximately

145

°C and increases it again automati-

cally when the temperature drops.

Accordingly transmission is not lost

under high ambient temperature condi-

tions.

The detector output, DET, is forced to a

logic low level when the temperature

guard is active.

R

LC

R

RX

R

REF

R

LD

C

VCC

C

TX

PBL 386 50/2

R

TX

0

-

+

0

CODEC/

Filter

R

FB

SYSTEM CONTROL

INTERFACE

R

R

R

T

R

B

-

+

VCC

VCC

BGND

TIPX

VBAT

VBAT2

PLC

POV

PLD

VCC

PSG

NC

LP

DT

NC

DET

C1

C2

RRLY

HP

NC

RINGX

AGND

RSN

NC

REF

PTG

VTX

DR

C3

PBL 386 50/2

R

OV

R

SG

C

LP

C

1

R

4

C

2

R

3

C

HP

VB2

SLIC No. 2 etc.

C

RC

R

P2

R

P1

R

F2

R

F1

TIP

RING

OVP

C

GG

C

TC

VB

+12 V /+5V

K

R

C

VB

D

VB2

C

VB2

D

BB

VB

D

VB

R

RT

E

RG

R

2

R

1

D

HP

NOTES:

1. R

place.

2. It is required to connect D

terminal HP and ground if C