17

* This specification are subject to be changed without notice.

EM83049

KEYBOARD ENCODER

5.2.1997

TIMING DIAGRAMS

CLK

DATA

1ST

CLK

2nd

CLK

10th

CLK

11th

CLK

T1

T3

T4

T2

T5

Start Bit

Bit 0

Parity Bit

Stop Bit

Fig 3. Keyboard output data timings

CLK

DATA

Start Bit

1ST

CLK

2nd

CLK

9th

CLK

10th

CLK

11th

CLK

Parity Bit

Stop Bit

Bit 0

T3

T4

T6

I/O

Inhibit

Fig 4. Keyboard input data timings

APPLICATION CIRCUIT

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

VSS

NC

DATA

CLK

P90

P91

NC

NC

XT

NC

P50

P51

P52

P53

P54

P55

P56

P57

P80

P81

OSCO

R-OSCI

VDD

CAPS

NUM

SCROLL

P67

P66

P65

P64

P63

P62

P61

P60

P87

P86

P85

P84

P83

P82

SCROLL

NUM

CAPS

R7

R6

R5

R4

R3

R2

R1

R0

C15

C14

C13

C12

C11

C10

C0

C1

C2

C3

C4

C5

C6

C7

C8

C9

C0

C1

C2

C3

C4

C5

C6

C7

C8

C9

C10

C11

C12

C13

C14

C15

C16

C17

R0

126

017

018

019

020

023

024

025

026

125

014

091

096

101

106

KL

DATA

CLK

C16

C17

U1

VCC

10µ

51K

EM83049

R1

016

030

114

021

022

028

118

027

015

092

097

102

107

044

LWIN

R2

031

032

033

034

037

038

039

040

029

093

098

103

108

057

RWIN

R3

110

045

115

035

036

117

041

060

122

061

099

104

083

R4

064

046

047

048

049

052

053

054

042

043

090

095

100

R5

131

132

133

050

051

056

APP

055

062

123

084

089

105

079

R6

058

001

112

113

006

007

013

119

012

120

076

075

085

080

KR

R7

116

002

003

004

005

008

009

010

011

124

121

086

081

XT