ADF7021 datasheet(36/64 Pages) AD

36 / 64 page

ADF7021

Data Sheet

Rev. B | Page 36 of 64

DEMODULATOR CONSIDERATIONS

2FSK Preamble

The recommended preamble bit pattern for 2FSK is a dc-free

pattern (such as a 10101010… pattern). Preamble patterns with

longer run-length constraints (such as 11001100…) can also be

used but result in a longer synchronization time of the received

bit stream in the receiver. The preamble needs to allow enough

bits for AGC settling of the receiver and CDR acquisition. A

minimum of 16 preamble bits is recommended. When the receiver

is using the internal AFC, the minimum recommended number

of preamble bits is 48.

The remaining fields that follow the preamble header do not

have to use dc-free coding. For these fields, the ADF7021 can

accommodate coding schemes with a run length of up to

eight bits without any performance degradation. If longer run

lengths are required, an encoding scheme such as 8B/10B or

Manchester encoding is recommended.

4FSK Preamble and Data Coding

The recommended preamble bit pattern for 4FSK is a repeating

00100010… bit sequence. This 2-level sequence of repeating

−3, +3, −3, +3 symbols is dc-free and maximizes the symbol

timing performance and data recovery of the 4FSK preamble in

the receiver. The minimum recommended length of the

preamble is 32 bits (16 symbols).

The remainder of the 4FSK packet should be constructed so

that the transmitted symbols retain close to dc-free property by

using data scrambling and/or by inserting specific dc balancing

symbols in the transmitted bit stream at regular intervals, such

as after every 8 or 16 symbols.

2FSK Correlator Demodulator and Frequency Errors

The ADF7021 has a number of options to combat frequency

errors that exist due to mismatches between the transmit and

receive crystals/TCXOs.

With AFC disabled, the correlator demodulator is tolerant to

frequency errors over the ±0.4 × fDEV range, where fDEVis the

FSK frequency deviation. For larger frequency errors, the

frequency tolerance can be widened to ±0.8 × fDEV by adjusting

the value of K and thus doubling the correlator bandwidth.

K should then be calculated as













DEV

Round

100

The DISCRIMINATOR_BW setting should also be recalculated

using the new K value. Doubling the correlator bandwidth to

improve frequency error tolerance in this manner typically

results in a 1 dB to 2 dB loss in receiver sensitivity.

Correlator Demodulator and Low Modulation Indices

The modulation index in 2FSK is defined as

Rate

Data

Index

Modulation

DEV

= 2

The receiver sensitivity performance can be maximized at low

modulation index by increasing the discriminator bandwidth of

the correlator demodulator. For modulation indices of less than

0.4, it is recommended to double the correlator bandwidth by

calculating K as follows:













DEV

Round

100

The DISCRIMINATOR_BW should be recalculated using the

new K value. Figure 26 highlights the improved sensitivity that

can be achieved for 2FSK modulation, at low modulation

indices, by doubling the correlator bandwidth.

AFC OPERATION

The ADF7021 also supports a real-time AFC loop that is used

to remove frequency errors due to mismatches between the

transmit and receive crystals/TCXOs. The AFC loop uses the

linear frequency discriminator block to estimate frequency

errors. The linear FSK discriminator output is filtered and

averaged to remove the FSK frequency modulation using a

combined averaging filter and envelope detector. In receive

mode, the output of the envelope detector provides an estimate

of the average IF frequency.

Two methods of AFC supported on the ADF7021 are external

and internal.

External AFC

Here, the user reads back the frequency information through

the ADF7021 serial port and applies a frequency correction

value to the fractional-N synthesizer-N divider.

The frequency information is obtained by reading the 16-bit

signed AFC readback, as described in the Readback Format

section, and by applying the following formula:

Frequency Readback [Hz] =

(AFC_READBACK × DEMOD CLK)/218

Although the AFC_READBACK value is a signed number, under

normal operating conditions, it is positive. In the absence of

frequency errors, the frequency readback value is equal to the

IF frequency of 100 kHz.

Internal AFC

The ADF7021 supports a real-time, internal, automatic

frequency control loop. In this mode, an internal control loop

automatically monitors the frequency error and adjusts the

synthesizer-N divider using an internal proportional integral

(PI) control loop.

The internal AFC control loop parameters are controlled in

R10_DB4 to 1. A scaling coefficient must also be entered, based

on the crystal frequency in use. This is set up in R10_DB[5:16]

and should be calculated using













XTAL

Round

FACTOR

SCALING

AFC

500

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