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DAC8562FS датащи(PDF) 10 Page - Analog Devices |
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DAC8562FS датащи(HTML) 10 Page - Analog Devices |
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10 / 16 page ![]() DAC8562 REV. A –10– 15 16 DGND AGND DATA DAC-8562 13 VOUT +12V OR +15V 10 CE CLR 1 12 0.1µF 4 REF-02 6 2 0.1µF Figure 31. Operating the DAC8562 on +12 V or +15 V Supplies Using a REF02 Voltage Reference Measuring Offset Error One of the most commonly specified endpoint errors associated with real-world nonideal DACs is offset error. In most DAC testing, the offset error is measured by applying the zero-scale code and measuring the output deviation from 0 volt. There are some DACs where offset errors may be present but not observable at the zero scale because of other circuit limi- tations (for example, zero coinciding with single supply ground). In these DACs, nonzero output at zero code cannot be read as the offset error. In the DAC8562, for example, the zero-scale er- ror is specified to be +3 LSBs. Since zero scale coincides with zero volt, it is not possible to measure negative offset error. By adding a pull-down resistor from the output of the DAC8562 to a negative supply as shown in Figure 32, offset er- rors can now be read at zero code. This configuration forces the output P-channel MOSFET to source current to the negative supply thereby allowing the designer to determine in which di- rection the offset error appears. The value of the resistor should be such that, at zero code, current through the resistor is 200 µA maximum. 15 16 DGND AGND VDD DATA DAC-8562 13 0.1µF VOUT +5V 10 CE CLR 20 12 200µA MAX V– Figure 32. Measuring Zero-Scale or Offset Error Unipolar Output Operation This is the basic mode of operation for the DAC8562. As shown in Figure 30, the DAC8562 has been designed to drive loads as low as 820 Ω in parallel with 500 pF. The code table for this op- eration is shown in Table III. 15 16 DGND AGND VDD DATA DAC-8562 13 10µF 0.1µF 0V ≤ V OUT ≤ 4.095V +5V 10 CE CLR 20 12 820 500pF Ω Figure 30. Unipolar Output Operation Table III. Unipolar Code Table Hexadecimal Number Decimal Number Analog Output in DAC Register in DAC Register Voltage (V) FFF 4095 +4.095 801 2049 +2.049 800 2048 +2.048 7FF 2047 +2.047 000 0 0 Operating the DAC8562 on +12 V or +15 V Supplies Only Although the DAC8562 has been specified to operate on a single, +5 V supply, a single +5 V supply may not be available in many applications. Since the DAC8562 consumes no more than 6 mA, maximum, then an integrated voltage reference, such as the REF02, can be used as the DAC8562 +5 V supply. The configuration of the circuit is shown in Figure 31. Notice that the reference’s output voltage requires no trimming because of the REF02’s excellent load regulation and tight initial output voltage tolerance. Although the maximum supply current of the DAC8562 is 6 mA, local bypassing of the REF02’s output with at least 0. 1 µF at the DAC’s voltage supply pin is recommended to prevent the DAC’s internal digital circuits from affecting the DAC’s internal voltage reference. |
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