DS87C520 datasheet(5/45 Pages) DALLAS

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DS87C520/DS83C520 EPROM/ROM High-Speed Microcontrollers

5 of 45

PIN DESCRIPTION (continued)

DIP

PLCC

TQFP

NAME

FUNCTION

ALE

Address Latch Enable Output. The ALE functions as a clock to

latch the external address LSB from the multiplexed address/data bus

on Port 0. This signal is commonly connected to the latch enable of an

external 373 family transparent latch. ALE has a pulse width of 1.5

XTAL1 cycles and a period of four XTAL1 cycles. ALE is forced

high when the DS87C520/DS83C520 are in a reset condition. ALE

can also be disabled and forced high by writing ALEOFF = 1

(PMR.2). ALE operates independently of ALEOFF during external

memory accesses.

P0.0 (AD0)

P0.1 (AD1)

P0.2 (AD2)

P0.3 (AD3)

P0.4 (AD4)

P0.5 (AD5)

P0.6 (AD6)

P0.7 (AD7)

Port 0 (AD0–7), I/O. Port 0 is an open-drain, 8-bit, bidirectional I/O

port. As an alternate function Port 0 can function as the multiplexed

address/data bus to access off-chip memory. During the time when

ALE is high, the LSB of a memory address is presented. When ALE

falls to a logic 0, the port transitions to a bidirectional data bus. This

bus is used to read external ROM and read/write external RAM

memory or peripherals. When used as a memory bus, the port

provides active high drivers. The reset condition of Port 0 is tri-state.

Pullup resistors are required when using Port 0 as an I/O port.

P1.0

P1.1

P1.2

P1.3

P1.4

P1.5

P1.6

P1.7

Port 1, I/O. Port 1 functions as both an 8-bit, bidirectional I/O port

and an alternate functional interface for Timer 2 I/O, new External

Interrupts, and new Serial Port 1. The reset condition of Port 1 is with

all bits at a logic 1. In this state, a weak pullup holds the port high.

This condition also serves as an input state; a weak pullup holds the

port high. This condition also serves as an input mode, since any

external circuit that writes to the port will overcome the weak pullup.

When software writes a 0 to any port pin, the DS87C520/DS83C520

will activate a strong pulldown that remains on until either a 1 is

written or a reset occurs. Writing a 1 after the port has been at 0 will

cause a strong transition driver to turn on, followed by a weaker

sustaining pullup. Once the momentary strong driver turns off, the

port again becomes the output high (and input) state. The alternate

modes of Port 1 are out-lines as follows.

Port

Alternate

Function

P1.0

External I/O for Timer/Counter 2

P1.1

T2EX

EX Timer/Counter 2 Capture/Reload Trigger

P1.2

RXD1

Serial Port 1 Input

P1.3

TXD1

Serial Port 1 Output

P1.4

INT2

External Interrupt 2 (Positive Edge Detect)

P1.5

INT3

External Interrupt 3 (Negative Edge Detect)

P1.6

INT4

External Interrupt 4 (Positive Edge Detect)

P1.7

INT5

External Interrupt 5 (Negative Edge Detect)

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