DS5002FP datasheet(12/25 Pages) DALLAS

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DS5002FP Secure Microprocessor Chip

12 of 25

NAME

FUNCTION

into A15 for a 128k x 8 SRAM.

CE3 is lithium-backed and remains at a logic high when VCC

falls below VLI.

CE4

Chip Enable 4. This chip enable is provided to access a fourth 32k block of memory. It

connects to the chip-enable input of one SRAM. When MSEL = 0, this signal is unused.

CE4

is lithium-backed and remains at a logic high when VCC falls below VLI.

PE1

Peripheral Enable 1. Accesses data memory between addresses 0000h and 3FFFh when the

PES bit is set to a logic 1. Commonly used to chip enable a byte-wide real-time clock such as

the DS1283.

PE1 is lithium-backed and will remain at a logic high when VCC falls below VLI.

Connect

PE1 to battery-backed functions only.

PE2

Peripheral Enable 2. Accesses data memory between addresses 4000h and 7FFFh when the

PES bit is set to a logic 1.

PE2 is lithium-backed and will remain at a logic high when VCC falls

below VLI. Connect PE2 to battery-backed functions only.

PE3

Peripheral Enable 3. Accesses data memory between addresses 8000h and BFFFh when the

PES bit is set to a logic 1.

PE3 is not lithium-backed and can be connected to any type of

peripheral function. If connected to a battery-backed chip, it will need additional circuitry to

maintain the chip enable in an inactive state when VCC < VLI.

PE4

Peripheral Enable 4. Accesses data memory between addresses C000h and FFFFh when

the PES bit is set to a logic 1.

PE4 is not lithium-backed and can be connected to any type of

peripheral function. If connected to a battery-backed chip, it will need additional circuitry to

maintain the chip enable in an inactive state when VCC < VLI.

PROG

Invokes the bootstrap loader on a falling edge. This signal should be debounced so that only

one edge is detected. If connected to ground, the micro enters bootstrap loading on power-

up. This signal is pulled up internally.

VRST

This I/O pin (open drain with internal pullup) indicates that the power supply (VCC) has fallen

below the VCCMIN level and the micro is in a reset state. When this occurs, the DS5002FP

drives this pin to a logic 0. Because the micro is lithium-backed, this signal is guaranteed

even when VCC = 0V. Because it is an I/O pin, it also forces a reset if pulled low externally.

This allows multiple parts to synchronize their power-down resets.

This output goes to a logic 0 to indicate that the micro has switched to lithium backup. This

corresponds to VCC < VLI. Because the micro is lithium-backed, this signal is guaranteed even

when VCC = 0V. The normal application of this signal is to control lithium powered current to

isolate battery-backed functions from non-battery-backed functions.

MSEL

Memory Select. This signal controls the memory size selection. When MSEL = +5V, the

DS5002FP expects to use 32k x 8 SRAMs. When MSEL = 0V, the DS5002FP expects to use

a 128k x 8 SRAM. MSEL must be connected regardless of partition, mode, etc.

SDI

Self-Destruct Input. An active high on this pin causes an unlock procedure. This results in the

destruction of Vector RAM, Encryption Keys, and the loss of power from VCCO. This pin

should be grounded if not used.

CE1N

This is a non-battery-backed version of

CE1. It is not generally useful since the DS5002FP

cannot be used with EPROM due to its encryption.

N.C.

No Connect

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