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DS2182 датащи(PDF) 3 Page - Dallas Semiconductor |
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DS2182 датащи(HTML) 3 Page - Dallas Semiconductor |
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3 / 25 page ![]() DS2182A 3 of 25 PIN DESCRIPTION Table 1 PIN SYMBOL TYPE DESCRIPTION 6 NC - No Connect. No internal connection. This pin can be tied to either VSS or VDD, or it can be floated. 7 RYEL O Receive Yellow Alarm. Transitions high when yellow alarm detected; goes low when alarm clears. 8 RLINK O Receive Link Data. Updated with extracted FDL data one RCLK before start of odd frames (193E) and held until next update. Updated with extracted S-bit data one RCLK before start of even frames (193S) and held until next update. 9 RLCLK O Receive Link Clock. 4 kHz demand clock for RLINK. 10 RCLK I Receive Clock. 1.544 MHz primary clock. 11 RCHCLK O Receive Channel Clock. 192 kHz clock; identifies time slot (channel) boundaries. 12 RSER O Receive Serial Data. Received NRZ serial data; updated on rising edges of RCLK. 13 NC - No Connect. No internal connection. This pin can be tied to either VSS or VDD, or it can be floated. 15 RFSYNC O Receive Frame Sync. Extracted 8 kHz clock, one RCLK wide; F- bit position in each frame. 16 RMSYNC O Receive Multiframe Sync. Extracted multiframe sync; positive- going edge indicates start of multiframe; 50% duty cycle. 17 RABCD O Receive ABCD Signaling. Extracted signaling data output; valid for each channel in signaling frames. In non-signaling frames, RABCD outputs the LSB of each channel word. 18 ESIGFR O Receive Signaling Frame. High during signaling frames; low during non-signaling frames (and during resync). 19 RSIGSEL O Receive Signaling Select. In 193E framing, a .667 kHz clock that identifies signaling frames A and C; a 1.33 kHz clock in 193S. 21 RST I Reset. A high-low transition clears all internal registers and resets counters. A high-low-high transition initiates a resync. 22 23 RPOS RNEG I Receive Bipolar Data Inputs. Sampled on falling of RCLK. Tie together to receive NRZ data and disable bipolar violation monitoring circuitry. 24 RCL O Receive Carrier Loss. High if 192 consecutive 0s appear at RPOS and RNEG; goes low upon seeing 12.5% one’s density. 25 RBV O Receive Bipolar Violation. High during accused bit time at RSER. If bipolar violation detected, low otherwise. 26 RFER O Receive Frame Error. High during F-bit time when FT or FS errors occur (193S), or when FPS or CRC errors occur (193E). Low during resync. 27 RLOS O Receive Loss of Sync. Indicates sync status; high when internal resync is in progress, low otherwise. |
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