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091599

FEATURES

§ Synchronizes loop–timed and system–timed

T1 data streams

§ Two–frame buffer depth; slips occur on frame

boundaries

§ Output indicates when slip occurs

§ Buffer may be recentered externally

§ Ideal for 1.544 to 2.048 MHz rate conversion

§ Interfaces to parallel or serial backplanes

§ Extracts and buffers robbed–bit signaling

§ Inhibits signaling updates during alarm or slip

conditions

§ Integration feature “debounces” signaling

§ Slip–compensated output indicates when

signaling updates occur

§ Compatible with DS2180A T1 Transceiver

§ Surface mount package available, designated

DS2176Q

§

Industrial temperature range of –40°C to

+85°C available, designated DS2176N

PIN ASSIGNMENT

DESCRIPTION

The DS2176 is a low–power CMOS device specifically designed for synchronizing receive side loop–

timed T–carrier data streams with system side timing. The device has several flexible operating modes

which simplify interfacing incoming data to parallel and serial TDM backplanes. The device extracts,

buffers and integrates ABCD signaling; signaling updates are prohibited during alarm or slip conditions.

The buffer replaces extensive hardware in existing applications with one “skinny” 24–lead package.

Application areas include digital trunks, drop and insert equipment, transcoders, digital cross–connects

(DACS), private network equipment and PABX–to–computer interfaces such as DMI and CPI.

DS2176

T1 Receive Buffer

www.dalsemi.com

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RCLK

A

C

D

SCHCLK

SM0

SM1

VSS

VDD

SCKLSEL

SYCLK

SSER

SLIP

SBIT8

SMSYNC

SIGFRZ

SFSYNC

ALN

FMS

S/P

1

2

3

4

5

6

7

8

9

10

11

12

24

22

21

20

19

18

17

16

15

14

13

RMSYN

RSER

B

SIGH

24-PIN 300 MIL DIP

28-PIN PLCC

A

B

NC

NC

C

D

SSER

SLIP

SBIT8

NC

NC

SMSYNC

SCHCLK

SIGFRZ

25

24

23

22

21

20

19

5

6

7

8

9

10

11

4

3

2

1

28

27

26

12

13 14

15

16

17

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