DS1621

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102299

The master device generates all of the serial clock pulses and the START and STOP conditions. A

transfer is ended with a STOP condition or with a repeated START condition. Since a repeated START

condition is also the beginning of the next serial transfer, the bus will not be released.

The DS1621 may operate in the following two modes:

1. Slave receiver mode: Serial data and clock are received through SDA and SCL. After each byte is

received an acknowledge bit is transmitted. START and STOP conditions are recognized as the

beginning and end of a serial transfer. Address recognition is performed by hardware after reception

of the slave address and direction bit.

2. Slave transmitter mode: The first byte is received and handled as in the slave receiver mode.

However, in this mode the direction bit will indicate that the transfer direction is reversed. Serial data

is transmitted on SDA by the DS1621 while the serial clock is input on SCL. START and STOP

conditions are recognized as the beginning and end of a serial transfer.

SLAVE ADDRESS

A control byte is the first byte received following the START condition from the master device. The

control byte consists of a 4-bit control code; for the DS1621, this is set as 1001 binary for read and write

operations. The next 3 bits of the control byte are the device select bits (A2, A1, A0). They are used by

the master device to select which of eight devices are to be accessed. These bits are in effect the 3 least

performed. When set to a “1” a read operation is selected, when set to a “0” a write operation is selected.

Following the START condition the DS1621 monitors the SDA bus checking the device type identifier

being transmitted. Upon receiving the 1001 code and appropriate device select bits, the slave device

outputs an acknowledge signal on the SDA line.