DS1307 datasheet(2/11 Pages) DALLAS

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DS1307

2 of 11

OPERATION

The DS1307 operates as a slave device on the serial bus. Access is obtained by implementing a START

condition and providing a device identification code followed by a register address. Subsequent registers

can be accessed sequentially until a STOP condition is executed. When VCC falls below 1.25 x VBAT the

device terminates an access in progress and resets the device address counter. Inputs to the device will

not be recognized at this time to prevent erroneous data from being written to the device from an out of

tolerance system. When VCC falls below VBAT the device switches into a low current battery backup

mode. Upon power up, the device switches from battery to VCC when VCC is greater than VBAT +0.2V and

recognizes inputs when VCC is greater than 1.25 x VBAT. The block diagram in Figure 1 shows the main

elements of the Serial Real Time Clock.

DS1307 BLOCK DIAGRAM Figure 1

SIGNAL DESCRIPTIONS

VCC, GND - DC power is provided to the device on these pins. VCC is the +5 volt input. When 5 volts is

applied within normal limits, the device is fully accessible and data can be written and read. When a

3-volt battery is connected to the device and VCC is below 1.25 x VBAT, reads and writes are inhibited.

However, the Timekeeping function continues unaffected by the lower input voltage. As VCC falls below

VBAT the RAM and timekeeper are switched over to the external power supply (nominal 3.0V DC) at

VBAT.

VBAT - Battery input for any standard 3-volt lithium cell or other energy source. Battery voltage must be

held between 2.0 and 3.5 volts for proper operation. The nominal write protect trip point voltage at which

access to the real time clock and user RAM is denied is set by the internal circuitry as 1.25 x VBAT

nominal. A lithium battery with 48 mAhr or greater will back up the DS1307 for more than 10 years in

the absence of power at 25 degrees C.

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