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W199
PRELIMINARY
8
Note:
2.
CPU and PCI frequency selections are listed in Table 2 and Table 6.
Table 6. Additional Frequency Selections through Serial Data Interface Data Bytes
Input Conditions
Output Frequency
Data Byte 0, Bit 3 = 1
CPU, SDRAM
Clocks (MHz)
PCI Clocks
(MHz)
Bit 2
SEL_3
Bit 6
SEL_2
Bit 5
SEL_1
Bit 4
SEL_0
1
1
1
1
133.3
33.3 (CPU/4)
1
1
1
0
124
31 (CPU/4)
1
1
0
1
150
37.5 (CPU/4)
1
1
0
0
140
35 (CPU/4)
1
0
1
1
105
35 (CPU/3)
1
0
1
0
110
36.7 (CPU/3)
1
0
0
1
115
39.3 (CPU/3)
1
0
0
0
120
40 (CPU/3)
0
1
1
1
100
33.3 (CPU/3)
0
1
1
0
133
44.3 (CPU/3)
0
1
0
1
112
37.3 (CPU/3)
0
1
0
0
103
34.3 (CPU/3)
0
0
1
1
66.8
33.4 (CPU/2)
0
0
1
0
83.3
41.7 (CPU/2)
0
0
0
1
75
37.5 (CPU/2)
0
0
0
0
124
41.3 (CPU/3)
Table 7. Select Function for Data Byte 0, Bits 0:1
Function
Input Conditions
Output Conditions
Data Byte 0
CPU_F,
CPU1
PCI_F,
PCI1:5
REF0:1,
IOAPIC
48MHZ
24MHZ
Bit 1
Bit 0
Spread Spectrum On
1
0
–0.5%
–0.5%
14.318 MHz
48 MHz
24 MHz
Spread Spectrum Off
(default)
0
0
Note 2
Note 2
14.318 MHz
48 MHz
24 MHz
Three-state
1
1
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