REFERENCES

1) " Area Efficient Decimation Filter for an 18-Bit Delta- Sigma ADC" by K. Lin and J.J. Paulos . Pa-

per presented at the 98th Convention of the Audio Engineering Society, Febuary 1995.

2) " An 18-Bit, 8-Pin Stereo Digital-to-Analog Converter" by J.J. Paulos, A.W. Krone, G.D. Kamath

and S.T. Dupuie. Paper presented at the 97th Convention of the Audio Engineering Society, Novem-

ber 1994.

3) " An 18-Bit Dual-Channel Oversampling Delta-Sigma A/D Converter, with 19-Bit Mono Applica-

tion Example" by Clif Sanchez. Paper presented at the 87th Convention of the Audio Engineering

Society, October 1989.

4) " The Effects of Sampling Clock Jitter on Nyquist Sampling Analog-to-Digital Converters, and on

Oversampling Delta Sigma ADC’s" by Steven Harris. Paper presented at the 87th Convention of the

Audio Engineering Society, October 1989.

5) "A Stereo 16-bit Delta-Sigma A/D Converter for Digital Audio" by D.R. Welland, B.P. Del Sig-

nore, E.J. Swanson, T. Tanaka, K. Hamashita, S. Hara, K. Takasuka. Paper presented at the 85th

Convention of the Audio Engineering Society, November 1988.

PACKAGE DESCRIPTIONS

Note: The EIAJ Package is not a standard JEDEC package size.

F

G

J

I

H

B

A

MILLIMETERS

INCHES

MIN

MAX

MAX

MIN

DIM

H

I

J

A

B

TYP

1.27

0.050

TYP

D

0

0.010

0

0.25

E

0.070

0.074

1.77

1.88

0.006

0.010

0.15

0.25

8

0

8

0

0.030

0.019

0.48

0.76

0.319

0.302

0.203

0.210

5.15

5.35

7.67

8.1

5.18

5.4

0.204

0.213

D

C

8-Pin

SOIC

E

F

0.33

0.51

0.020

G

C

0.013

CS5330A/CS5331A

DS138F2

15