AT45DB021D_13 datasheet(20/48 Pages) ETC2

20 / 48 page

3638M–DFLASH–5/2013

AT45DB021D

Table 9-1.

Status Register Format

10.

Deep Power-down

After initial power-up, the device will default in standby mode. The Deep Power-down command allows the device

to enter into the lowest power consumption mode. To enter the Deep Power-down mode, the CS pin must first be

asserted. Once the CS pin has been asserted, an opcode of B9H command must be clocked in via input pin (SI).

After the last bit of the command has been clocked in, the CS pin must be de-asserted to initiate the Deep Power-

down operation. After the CS pin is de-asserted, the will device enter the Deep Power-down mode within the

maximum tEDPD time. Once the device has entered the Deep Power-down mode, all instructions are ignored except

for the Resume from Deep Power-down command.

Table 10-1.

Deep Power-down

Figure 10-1. Deep Power-down

10.1 Resume from Deep Power-down

The Resume from Deep Power-down command takes the device out of the Deep Power-down mode and returns it

to the normal standby mode. To Resume from Deep Power-down mode, the CS pin must first be asserted and an

opcode of ABH command must be clocked in via input pin (SI). After the last bit of the command has been clocked

in, the CS pin must be de-asserted to terminate the Deep Power-down mode. After the CS pin is de-asserted, the

device will return to the normal standby mode within the maximum tRDPD time. The CS pin must remain high during

the tRDPD time before the device can receive any commands. After resuming form Deep Power-down, the device

will return to the normal standby mode.

Table 10-2.

Resume from Deep Power-down

Figure 10-2. Resume from Deep Power-Down

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

RDY/BUSY

COMP

PROTECT

PAGE SIZE

Command

Opcode

Deep Power-down

B9H

Opcode

Each transition

represents 8 bits

Command

Opcode

Resume from Deep Power-down

ABH

Opcode

Each transition

represents 8 bits

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