CS4220 CS4221

16

DS284PP3

5.5

DSP Port Mode (address 05h)

5.5.1

DE-EMPHASIS CONTROL (DEM)

Default = 00

00 - 44.1 kHz de-emphasis setting

01 - 48 kHz de-emphasis setting

10 - 32 kHz de-emphasis setting

11 - De-emphasis disabled

Function:

Selects the appropriate digital filter to maintain the standard 15

µs/50 µs digital de-emphasis filter re-

sponse at 32, 44.1 or 48 kHz sample rates, see Figure 15.

5.5.2

SERIAL INPUT/OUTPUT DATA SCLK POLARITY SELECT (DSCK)

Default = 0

0 - Data valid on rising edge of SCLK

1 - Data valid on falling edge of SCLK

Function:

This function selects the polarity of the SCLK edge used to clock data in and out of the serial audio

port.

5.5.3

SERIAL DATA OUTPUT FORMAT (DOF)

Default = 00

01 - Left justified

10 - Right justified, 24-bit

11 - Right justified, 20-bit

Function:

The required relationship between the left/right clock, serial clock and output serial data is defined by

the Serial Data Output Format, and the options are detailed in Figures 8-11.

Note: If the format selected is Right-Justified, SCLK must be 64 Fs when operating in slave mode.

5.5.4

SERIAL DATA INPUT FORMAT (DIF)

Default = 00

01 - Left justified

10 - Right justified, 24-bit

11- Right justified, 20-bit

Function:

The required relationship between the left/right clock, serial clock and input serial data is defined by

the Serial Data Input Format, and the options are detailed in Figures 8-11.

765

4321

0

Reserved

DEM1

DEM0

DSCK

DOF1

DOF0

DIF1

DIF0

000

0000

0