7

Step 1:

Place the completed circuit with a tantalum capaci-

tor of the recommended value in an environmental cham-

ber at the lowest specified operating temperature and

monitor the outputs on the oscilloscope. A decade box

higher ESR of an aluminum capacitor. (Leave the decade

box outside the chamber, the small resistance added by

the longer leads is negligible)

Step 2:

With the input voltage at its maximum value,

increase the load current slowly from zero to full load

while observing the output for any oscillations. If no oscil-

lations are observed, the capacitor is large enough to

ensure a stable design under steady state conditions.

Step 3:

Increase the ESR of the capacitor from zero using

the decade box and vary the load current until oscillations

appear. Record the values of load current and ESR that

cause the greatest oscillation. This represents the worst

case load conditions for the regulator at low temperature.

Step 4:

Maintain the worst case load conditions set in step

3 and vary the input voltage until the oscillations increase.

This point represents the worst case input voltage condi-

tions.

Step 5:

with the next smaller valued capacitor. (A smaller capaci-

tor will usually cost less and occupy less board space.) If

the capacitor oscillates within the range of expected oper-

ating conditions, repeat steps 3 and 4 with the next larger

standard capacitor value.

Step 6:

Test the load transient response by switching in

various loads at several frequencies to simulate its real

work environment. Vary the ESR to reduce ringing.

Step 7:

Remove the unit from the environmental chamber

and heat the IC with a heat gun. Vary the load current as

instructed in step 5 to test for any oscillations.

Once the minimum capacitor value with the maximum

ESR is found, a safety factor should be added to allow for

the tolerance of the capacitor and any variations in regula-

tor performance. Most good quality aluminum electrolytic

capacitors have a tolerance of +/-20% so the minimum

value found should be increased by at least 50% to allow

for this tolerance plus the variation which will occur at

low temperatures. The ESR of the capacitor should be less

than 50% of the maximum allowable ESR found in step 3

above. Once the value for C2 is determined, repeat the

steps to determine the appropriate value for C3.

The maximum power dissipation for a dual output regula-

tor (Figure 1) is

(1)

Where

cation

cation

sible value of R

R

(2)

The value of R

the package section of the data sheet. Those packages

with R

will keep the die temperature below 150¡C.

In some cases, none of the packages will be sufficient to

dissipate the heat generated by the IC, and an external

heatsink will be required.

A heat sink effectively increases the surface area of the

package to improve the flow of heat away from the IC and

into the surrounding air.

Each material in the heat flow path between the IC and the

outside environment will have a thermal resistance. Like

series electrical resistances, these resistances are summed

to determine the value of R

R

(3)

where

R

R

R

R

R

are functions of the package type, heatsink and the inter-

face between them. These values appear in heat sink data

sheets of heat sink manufacturers.

150¡C - T

A

Application Notes: continued

Calculating Power Dissipation

in a Dual Output Linear Regulator

Smart

Regulator

Control

Features

}

Figure 1: Dual output regulator with key performance parameters

labeled.

Heat Sinks