CS5165 datasheet(13/19 Pages) CHERRY

13 / 19 page

Figure 18: Gate drive waveforms depicting rail to rail swing.

Figure 19: Normal Operation showing the guaranteed Non-Overlap

time between the High and Low - Side MOSFET Gate Drives, ILOAD =

14A.

The CS5165 provides adaptive control of the external NFET

conduction times by guaranteeing a typical 65ns non-over-

lap between the upper and lower MOSFET gate drive puls-

es. This feature eliminates the potentially catastrophic

effect of “shoot-through current”, a condition during

which both FETs conduct causing them to overheat, self-

destruct, and possibly inflict irreversible damage to the

processor.

The most important aspect of FET performance is RDSON,

which effects regulator efficiency and FET thermal man-

agement requirements.

The power dissipated by the MOSFETs may be estimated

as follows:

Switching MOSFET:

Power = ILOAD2 × RDSON × duty cycle

Synchronous MOSFET:

Power = ILOAD2 × RDSON × (1 - duty cycle)

Duty Cycle =

Off Time Capacitor (COFF)

The COFF timing capacitor sets the regulator off time:

TOFF = COFF × 4848.5

The preceding equation for Duty Cycle can also be used to

calculate the regulator switching frequency and select the

COFF timing capacitor:

COFF =

where

period =

Schottky Diode for Synchronous FET

For synchronous operation, A Schottky diode may be

placed in parallel with the synchronous FET to conduct the

inductor current upon turn off of the switching FET to

improve efficiency. The CS5165 reference circuit does not

use this device due to its excellent design. Instead, the

body diode of the synchronous FET is utilized to reduce

cost and conducts the inductor current. For a design oper-

ating at 200kHz or so, the low non-overlap time combined

with Schottky forward recovery time may make the bene-

fits of this device not worth the additional expense. The

power dissipation in the synchronous MOSFET due to

body diode conduction can be estimated by the following

equation:

Power = Vbd × ILOAD × conduction time × switching fre-

quency

Where Vbd = the forward drop of the MOSFET body diode.

For the CS5165 demonstration board:

Power = 1.6V × 14.2A × 100ns × 200kHz = 0.45W

This is only 1.1% of the 40W being delivered to the load.

switching frequency

Period × (1-Duty Cycle)

4848.5

VOUT + (ILOAD × RDSON OF SYNCH FET)

VIN + (ILOAD × RDSON OF SYNCH FET) - (ILOAD × RDSON OF SWITCH FET)

Trace 1 - GATE(H) (5V/div)

Trace 2 - GATE(L) (5V/div)

Trace 3 = GATE(H) (10V/div.)

Trace 1= GATE(H) - 5VIN

Trace 4 = GATE(L) (10V/div.)

Trace 2 = Inductor Switching Node (5V/div.)

Application Information: continued

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