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CS5157GD16 датащи(PDF) 12 Page - Cherry Semiconductor Corporation |
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CS5157GD16 датащи(HTML) 12 Page - Cherry Semiconductor Corporation |
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12 / 14 page ![]() Applications Information: continued 12 A heatsink may be added to TO-220 components to reduce their thermal impedance. A number of PC board layout techniques such as thermal bias and additional copper foil area can be used to improve the power handling capability of surface mount components. EMI Management As a consequence of large currents being turned on and off at high frequency, switching regulators generate noise as a consequence of their normal operation. When designing for compliance with EMI/EMC regulations, additional compo- nents may be added to reduce noise emissions. These com- ponents are not required for regulator operation and exper- imental results may allow them to be eliminated. The input filter inductor may not be required because bulk filter and bypass capacitors, as well as other loads located on the board will tend to reduce regulator di/dt effects on the cir- cuit board and input power supply. Placement of the power component to minimize routing distance will also help to reduce emissions. Figure 18: Filter components Figure 19: Input Filter Layout Guidelines 1. Place 12V filter capacitor next to the IC and connect capacitor ground to pin 11 (PGnd). 2. Connect pin 11 (PGnd) with a separate trace to the ground terminals of the 5V input capacitors. 3. Place fast feedback filter capacitor next to pin 8 (VFFB) and connect it’s ground terminal with a separate, wide trace directly to pin 14 (LGnd). 4. Connect the ground terminals of the Compensation capacitor directly to the ground of the fast feedback filter capacitor to prevent common mode noise from effecting the PWM comparator. 5. Place the output filter capacitor(s) as close to the load as possible and connect the ground terminal to pin 14 (LGnd). 6. Connect the VFB pin directly to the load with a separate trace (remote sense). 7. Place 5V input capacitors close to the switching MOSFET and synchronous MOSFET. Route gate drive signals VGATE(H) (pin 10) and VGATE(L) (pin 12 when used) with traces that are a minimum of 0.025 inches wide. Figure 20: Layout Guidelines 15 To the negative terminal of the input capacitors 100pF VFFB 11 8 OFF TIME 5 SOFTSTART VCC 0.1µF To the negative terminal of the output capacitors 1.0µF VCOMP + 2µH 1200µF x 3/16V 33Ω 1000pF 2µH |
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