поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

U74HCT7046L-S16-R датащи(PDF) 10 Page - Unisonic Technologies

номер детали U74HCT7046L-S16-R
подробное описание детали  PHASE LOCKED LOOP WITH VCO & LOCK DETECTOR
PDF  16 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  UTC [Unisonic Technologies]
домашняя страница  http://www.utc-ic.com
Logo UTC - Unisonic Technologies

U74HCT7046L-S16-R датащи(HTML) 10 Page - Unisonic Technologies

Back Button U74HCT7046L-S16-R Datasheet HTML 6Page - Unisonic Technologies U74HCT7046L-S16-R Datasheet HTML 7Page - Unisonic Technologies U74HCT7046L-S16-R Datasheet HTML 8Page - Unisonic Technologies U74HCT7046L-S16-R Datasheet HTML 9Page - Unisonic Technologies U74HCT7046L-S16-R Datasheet HTML 10Page - Unisonic Technologies U74HCT7046L-S16-R Datasheet HTML 11Page - Unisonic Technologies U74HCT7046L-S16-R Datasheet HTML 12Page - Unisonic Technologies U74HCT7046L-S16-R Datasheet HTML 13Page - Unisonic Technologies U74HCT7046L-S16-R Datasheet HTML 14Page - Unisonic Technologies Next Button
Zoom Inzoom in Zoom Outzoom out
 10 / 16 page
background image
U74HCT7046
CMOS IC
UNISONICTECHNOLOGIESCO.,LTD
10 of 16
www.unisonic.com.tw
QW-R502-851.A
PHASE COMPARATORS (Cont.)
Phase comparator 2 (PC2)
This is a positive edge-triggered phase and frequency detector. If the PLL is using the comparator, the loop is
controlled by positive signal transitions and the duty factors of SIGIN and COMPIN are not important. PC2 is
comprised of two D-type flip-flops, control-gating and a 3-state output stage. The circuit function is as an up-down
counter (Logic Diagram) for SIGIN causes an up-count and COMPIN causes a down-count.
The transfer function of PC2, assuming ripple (fr = fi) is suppressed, is
)
(
4
V
V
COMPIN
SIGIN
DEMOUT
CC
φ
φ
π
=
where VDEMOUT is the demodulator output at pin 10; VDEMOUT = VPC2OUT (via low-pass filter).
The phase comparator gain is:
)
r
V /
(
4
V
K
CC
P
π
=
As shown in Fig.3, VDEMOUT is the resultant of the initial phase differences of SIGIN and COMPIN. Typical
waveforms for the PC2 loop locked at fo are shown in Fig.4.
π
4
Fig.3 Phase comparator 2: average output voltage versus input phase difference.
Fig.4 Typical waveforms for PLL using phase comparator 2, loop locked at fo.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com