CS2516 datasheet(4/6 Pages) CHERRY

4 / 6 page

Program and Standby Currents:

IP =

Å 1µA Standby Current = 4IP = 4µA (typ.)

9.1m½

VCC

Test Pulse Width:

Tp = RdCT x ln(VP) Å 242CTÅ 242 x 4.7µF Å 1.14ms

where Rd is the dynamic cycle timer discharge impedance (440½ typ.)

and VP =

[1n(VP) = 0.55 typ.]

Pulse Stretcher: Delay Time:

TD =

Å 1ms

where Vd = Schmitt Trigger Upper Threshold (2.5V typ.)

and Isrc = Typical source current at the PW pin at the nominal low battery sense threshold of 6.7V.

Pulse Width: Tp = CPWRPW ln(VS) Å 0.51 x 0.1µF x 10m½ Å 510ms.

and VS =

[ln(VS) = 0.51 typ.]

Schmitt Trigger Upper Threshold

Schmitt Trigger Hysteresis

2.5 x 0.1µF

250µA

2.5CPW

250µA

VdCPW

Isrc

Upper Charge Threshold

Lower Discharge Threshold

VCC

220

CS2516

4.7

9.1M

OUT

Load Switch

SENSE

COM

Cpw

Rpw

10M

0.1

510

VCC

Applications Information

Typical Application Circuit

The value of Rp affects standby current, operating current,

and the test cycle period. The recommended value is

(V+/1µA) where V+ is the fresh battery voltage. Higher

values of Rp are not recommended. Minimum recom-

mended value is (V+/10µA) which will increase both the

standby and operating currents by 10X and reduce the test

cycle period by the same factor; the test pulse width will

be unaffected.

The value of Ct affects both the test cycle period and the

test pulse width. Of critical importance is the selection of a

low leakage type capacitor; if leakage current exceeds the

cycle timer charge current, the timer will not operate.

The pulse stretcher components RPW and CPW should be

selected such that the delay timer to charge CPW is shorter

than the test pulse width programmed by Ct to guarantee

operation of the Output. The output is an open-collector

transistor which may be used to drive an indicator device

directly or to interface to logic family devices.

The SENSE input typical 8.5k½ input impedance appears

only during the test pulse; otherwise the SENSE input is in

a high impedance state. The effective low battery thresh-

old voltage can be modified (increased only) by means of a

voltage divider placed across the load resistor. This tech-

nique can also be used to effectively reduce the threshold

tolerance band.

Applications Formulae and Typical Values

Cycle Timer Period:

Tt ===

Å 33sec.,

where Vt = Upper Charge Threshold - Lower Charge Threshold (7V typ.)

7 x 4.7µF

1µA

7CT

1µA

VTCT

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