 |
поискавой системы для электроныых деталей |
|
|
поискавой системы для электроныых деталей |
|
ICS953002 датащи(PDF) 3 Page - Integrated Circuit Systems |
|
|
|||||||||||||||||||||||||||||
ICS953002 датащи(HTML) 3 Page - Integrated Circuit Systems |
|
|
3 / 35 page  3 Integrated Circuit Systems, Inc. ICS953002 0924—11/18/09 Pin Description (Continued) PIN # PIN NAME TYPE DESCRIPTION 29 3V66_0 OUT 3.3V 66.66MHz clock output 30 GND3V66 PWR Ground pin for the 3.3V 66MHz clocks 31 SCLK IN Clock pin of SMBus circuitry, 5V tolerant. 32 GNDPCIEX PWR Ground pin for the PCI-EX outputs 33 PCIEXC5/PCI_PCIEX_STO P#* OUT Complement clock of differential PCI_Express pair. / Active low signal that stops all PCI and PCIEX clocks besides the free running clocks 34 PCIEXT5/CPU_STOP#* OUT True clock of differential PCI_Express pair./Stops all CPUCLK besides the free running clocks 35 PCIEXC4 OUT Complement clock of differential PCI_Express pair. 36 PCIEXT4 OUT True clock of differential PCI_Express pair. 37 PCIEXC3 OUT Complement clock of differential PCI_Express pair. 38 PCIEXT3 OUT True clock of differential PCI_Express pair. 39 VDDPCIEX PWR Power supply for PCI Express clocks, nominal 3.3V 40 GNDPCIEX PWR Ground pin for the PCI-EX outputs 41 PCIEXC2 OUT Complement clock of differential PCI_Express pair. 42 PCIEXT2 OUT True clock of differential PCI_Express pair. 43 PCIEXC1 OUT Complement clock of differential PCI_Express pair. 44 PCIEXT1 OUT True clock of differential PCI_Express pair. 45 VDDPCIEX PWR Power supply for PCI Express clocks, nominal 3.3V 46 CPUCLKC2_ITP/PCIEXC0 OUT Complementary clock of differential pair CPU outputs. These are current mode outputs. External resistors are required for voltage bias./ Complement clock of differential PCIEX pair 47 CPUCLKT2_ITP/PCIEXT0 OUT True clock of differential pair CPU outputs. These are current mode outputs. External resistors are required for voltage bias. / True clock of differential PCIEX pair 48 SDATA I/O Data pin for SMBus circuitry, 5V tolerant. 49 VDDCPU PWR Supply for CPU clocks, 3.3V nominal 50 CPUCLKC1 OUT Complementary clock of differential pair CPU outputs. These are current mode outputs. External resistors are required for voltage bias. 51 CPUCLKT1 OUT True clock of differential pair CPU outputs. These are current mode outputs. External resistors are required for voltage bias. 52 GNDCPU PWR Ground pin for the CPU outputs 53 CPUCLKC0 OUT Complementary clock of differential pair CPU outputs. These are current mode outputs. External resistors are required for voltage bias. 54 CPUCLKT0 OUT True clock of differential pair CPU outputs. These are current mode outputs. External resistors are required for voltage bias. 55 IREF OUT This pin establishes the reference current for the differential current-mode output pairs. This pin requires a fixed precision resistor tied to ground in order to establish the appropriate current. 475 ohms is the standard value. 56 GND PWR Ground pin. |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
