ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322

Data Sheet

Rev. 0 | Page 10 of 16

THEORY OF OPERATION

CIRCUIT DESCRIPTION

The ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/

ADM8322 provide microprocessor supply voltage supervision

by controlling the microprocessor reset input. Code execution

errors are avoided during power-up, power-down, and

brownout conditions by asserting a reset signal when the supply

voltage is below a preset threshold and by allowing supply

voltage stabilization with a fixed timeout reset delay after the

supply voltage rises above the threshold. In addition, problems

with microprocessor code execution can be monitored and

corrected with a watchdog timer (ADM8316/ADM8318/

ADM8320/ADM8321). If the user detects a problem with

system operation, a manual reset input is available (ADM8316/

ADM8319/ADM8320/ADM8322) to reset the microprocessor,

for example, by means of an external push-button switch.

PUSH-PULL RESET OUTPUT

The ADM8316 features an active low push-pull reset output,

whereas the ADM8321/ADM8322 have active high push-pull

reset outputs. The ADM8318/ADM8319 feature dual active low

and active high push-pull reset outputs. For active low and

active high outputs, the reset signal is guaranteed to be valid for

remains asserted for the duration of the reset active timeout

transitions from low to high, or after the watchdog timer times

out. Figure 20 illustrates the behavior of the reset outputs.

Figure 20. Reset Timing Diagram

OPEN-DRAIN RESET OUTPUT

The ADM8320/ADM8321/ADM8322 have an active low, open-

drain reset output. This output structure requires an external

pull-up resistor to connect the reset output to a voltage rail no

logic high voltage level requirements of the microprocessor

while supplying input current and leakage paths on the RESET

line is recommended. A 10 kΩ resistor is adequate in most

situations.

MANUAL RESET INPUT

The ADM8316/ADM8319/ADM8320/ADM8322 feature a

manual reset input (MR), which when driven low, asserts the reset

output. When MR transitions from low to high, the reset

remains asserted for the duration of the reset active timeout

period before deasserting. The MR input has a 75 kΩ, internal

pull-up resistor so that the input is always high when

unconnected. An external push-button switch can be connected

between MR and ground so that the user can generate a reset.

Debounce circuitry for this purpose is integrated on chip. Noise

immunity is provided on the MR input, and fast, negative going

transients of up to 100 ns (typical) are ignored. A 0.1 μF capacitor

between MR and ground provides additional noise immunity.

WATCHDOG INPUT

The ADM8316/ADM8318/ADM8320/ADM8321 feature a

watchdog timer that monitors microprocessor activity. A timer

circuit is cleared with every low-to-high or high-to-low logic

transition on the watchdog input pin (WDI), which detects pulses

as short as 50 ns. If the timer counts through the preset

processor is required to toggle the WDI pin to avoid asserting

the reset pin. Failure of the microprocessor to toggle WDI

within the timeout period, therefore, indicates a code execution

error, and the reset pulse generated restarts the microprocessor

in a known state.

As well as logic transitions on WDI, the watchdog timer is also

cleared by a reset assertion due to an undervoltage condition on

watchdog timer clears and does not begin counting again until

the reset deassserts. The watchdog timer can be disabled by

leaving WDI floating or by tristating the WDI driver.

Figure 21. Watchdog Timing Diagram

1V

0V

0V

0V

RESET

RESET

1V

1V

0V

0V

0V

WDI

RESET