CLM7660

FIGURE 1. CLM7660 TEST CIRCUIT

L

I

S

I

1

2

3

8

6

45

CLM7660

1K-11

+

+

O

V

10

µF

10

µF

2

C

1

C

(+5)

L

R

X

D**

7

OSC

C*

+

V

CORPORATION

FIGURE 2. CHIP TOPOGRAPHY

DIE SIZE = 81.5 x 57.5 (mm)

1L-05

C+

GND

C-

V

OUT

LV

OSC

V8

FIGURE 3. IDEALIZED SWITCHED CAPACITOR

1K-12

GND

3

S

V

4

S

2

C

2

S

1

S

+

V

FIGURE 4. SIMPLE NEGATIVE CONVERTER

1

2

3

8

7

6

45

CLM7660

1K-05

+

+

V

+

OUT

V

X

D

10

µF

10

µF

2

C

1

C

*

FIGURE 5. PARALLELING DEVICES LOWERS OUTPUT IMPEDANCE

1

2

3

8

7

6

45

CLM7660

1

C

1K-06

+

V

1

2

3

8

7

6

45

CLM7660

1

C

+

2

C

L

R

"n"

"1"

X

D

X

D

NOTES:

µF.

** DX is required for supply voltages greater than 6.5V at

-55

o

additional information.

*NOTES: