CALIFORNIA MICRO DEVICES

©2000 California Micro Devices Corp. All rights reserved. SmartOR™ is a trademark of California Micro Devices Corporation.

12/5/2000

215 Topaz Street, Milpitas, California 95035



Tel: (408) 263-3214

Fax: (408) 263-7846

www.calmicro.com

8

CMPWR160

Load Step response

Figure 11 shows the output voltage (Ch1) response of

the regulator during a step load change between 5mA

and 500mA (represented on Ch2). For the 5mA to

500mA transition an initial transient overshoot of 60mV

occurs and then the output settles to its final voltage

within 20µs. For the 500mA to 5mA transition there is

also an initial overshoot of 60mV however it takes

approximately 250µs to settle to its final voltage.

The overall DC voltage disturbance on the output is

approximately 25mV, which demonstrates the regulator

output impedance of 50m

Ω.

V

Line Step Response

Figure 12 shows the output response of the regulator to

a V

(1Vpp as shown on Ch2). The load condition during this

test is 5mA. The output response produces less than

10mV of disturbance on both edges indicating a line

rejection of better than 40dB at high frequencies.

V

Reset response time with overdrive

trigger threshold by varying amounts. The amount the

voltage is driven below the POR trigger threshold is the

overdrive voltage.

Figure 11. Load Step Response

Figure 12. Line Step Response

Figure 13. Reset Response Time with Overdrive

1.60V

M 200µs

50.0mV

Ch1

1

2.00V

250kS/s

Tek Run

Sample

Ch2

Load

5mA

500mA

VOUT (offset = 3.3V)

5.00V

(5mA Load)

4.5V

5.5V

M 200µs

20.0mV Ch2

2

500mV

250kS/s

Tek

2 Acqs

Ch2

VOUT(offset = 3.3V)

VCC

1000

100

10

1

0

50

100

150

200

Overdrive (mV)

250

300