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BUJD203AX датащи(PDF) 4 Page - NXP Semiconductors |
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BUJD203AX датащи(HTML) 4 Page - NXP Semiconductors |
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4 / 14 page ![]() BUJD203AX All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 01 — 27 September 2010 4 of 14 NXP Semiconductors BUJD203AX NPN power transistor with integrated diode 1)Ptot maximum and Ptot peak maximum lines 2)Second breakdown limits 3) I = Region of permissable DC operation II = Extension for repetitive pulse operation III = Extension during turn-on in single transistor converters provided that RBE ≤ 100 Ω and tp ≤ 0.6 μs Fig 4. Forward bias safe operating area for Tmb ≤ 25 °C 001aac001 10−1 10−2 10 1 102 IC (A) 10−3 VCEclamp (V) 1 103 102 10 (1) 100 μs 200 μs I(3) tp = 20 μs duty cycle = 0.01 50 μs 500 μs DC II(3) III(3) (2) ICM(max) IC(max) |
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