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AS5130

Datasheet - Detailed Descr i pti on

If the AS5130 is cycled between active and reduced current mode, a substantial reduction of the average supply current can be achieved. The

minimum dwelling time in active mode is the wake-up time. The actual active time depends on how much the magnet has moved while the

AS5130 was in reduced power mode. The angle data is valid, when the status bit LOCK has been set (see Table 9). Once a valid angle has been

measured, the AS5130 can be put back to reduced power mode. The average power consumption can be calculated as:

(EQ 7)

Where:

all conditions, especially during long active periods when the charge on Cx has expired. Cx should be chosen such that it can support peak

currents during the active operation period. For long active periods, Cx should be large and Rx should be small.

7.8.2 Power Cycling Mode

The power cycling method shown in Figure 17 cycles the AS5130 by switching it on and off, using an external PNP transistor high side switch.

The current consumption in off-mode is zero. It also has the longest start-up time of all modes, as the chip must always perform a “cold start“

from zero, which takes about 2ms (Compare with Low Power Mode on page 22).

Figure 17. Power Cycling Mode

The optional filter Rx/Cx may again be added to reduce peak currents in the 5V power supply line (see Reducing Power Supply Peak Currents

on page 23).

I

active

∗t

on

I

powerdown

∗t

off

+

t

on

t

off

+

---------------------------------------------------------------------

micro

controller

AS5130

100n

+5V

CS

DCLK

DIO

AS5130

C1

S

N

0

on/off

Rx

10k

Cx

>µF