HS9410 datasheet(2/3 Pages) APITECH

2 / 3 page

SPECIFICATIO N S

(Typical@ +25ºC with VCC = + VEE = –15 V.VLOGIC = + 5V, unless otherwise specified)

M ODEL

HS 941XJ

HS 941XK

HS 941XS

HS941XT

TRA NSFER CHA RA CTERISTICS

Resolution

12-Bits

Number of Channels

8 Single-Ended

Throughput Rate

25 kHz

A NA LOG INPUTS

Input Ranges1 (Specified as a sullix in the model number. See Ordering Guide.)

HS9410

0 to +10V

HS9411

±5V

HS9412

±10V

Input Bias Current per Channel

IIB25ºC

±10 nA typ

-55ºCto +125ºC

± 250nA max

Input Impedance

ON Channel

1010 II 100pf

OFF Channel

1010 II 10pf

DIGITA L INPUTS

Logic Inputs

R/C.A 0

V IH min

+2.4V

V IH max

+5.5V

V IL max

+0.8V

V IL min

–0.5V

IIL max

±5µA max

IIL max

±5µA max

M ultiplexer inputs

V max

+0.8V

V ILmin

+4.0V

+4.0V 2

Input Capacitance (A ll Digital Inputs)

5pF typ

M inimum Start Pulse

R/C-Negative

50ns

SIGNA L DY NA M ICS

Conversion Time

12-Bit Conversion

25µs max

8-Bit Conversion

9µs max

DIGITA L OUTPUTS

Logic Outputs

DB11-DB0. STS

Logic 0

+0.4V max. IOL 1.6mA

Logic 1

+2.4V min. IOH 0.5mA

Leakage (High 2 Slate)

±5µA typ (DB11 DB0 only)

Capacitance

5pF typ

Output Code Configuration

Unipolar

Positive True Binary

Bipolar

Positive True Offset Binary

POW ER SUPPLY

V LOGIC

+4.5 to +5.5 V olts@11mA max

V CC

+13.5 to +16.5 V olts@35mA max

V EE

–13.5 to –16.5 V olts@15mA max

Power Dissipation

700mW typ.,1W max.

Rejection3

V LOGIC

0.002% /% lyp. 0 005% /% max

V CC

0.002% /% lyp. 0 005% /% max

V EE

0.002% /% lyp. 0 005% /% max

A CCURA CY

Linearity Error (% of F.S.R. max)

±0.025

±0.012

±0.025

±0.012

Offset4

Unpolar (% of F.S.R. max)

±0.05

Bipolar (% of F.S.R. max)

±0.25

±0.01

±0.25

±0.01

Gain4 (% of F.S.R. max)

±0.3

HS9410 SERIES

Continued on next page.

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