AS3677 datasheet(13/68 Pages) AMSCO

13 / 68 page

www.austriamicrosystems.com/AS3677

1v3-1

12 - 67

AS3677

Datasheet - D e ta i l e d D e s c r i p t i o n

8.2.3

PCB Layout Hints

To ensure good EMC performance of the DCDC converter, keep its external power components C1, L1, D1 and C2

close together. Connect the ground of C1, C2 locally together and connect this with a short path to AS3677 VSS. This

ensures that local high-frequency currents will not flow to the battery.

8.2.4

Step up Registers

Table 8. Reg control

Addr: 00

Reg control

This register enables/disables the Charge Pump and the Step Up DC/DC

Converter.

Bit

Bit Name

Default Access

Description

step_up_on

0R/W

Enable the step up converter

Disable the Step Up DC/DC Converter

Enable the Step Up DC/DC Converter

Table 9. DCDC control1

Addr: 21h

DCDC control1

This register controls the Step Up DC/DC Converter.

Bit

Bit Name

Default Access

Description

step_up_frequ

R/W

Defines the clock frequency of the Step Up DC/DC

Converter.

01MHz

500kHz

2:1

step_up_fb

R/W

Controls the feedback source if step_up_fb_auto = 0

no feedback selected - don’t use

CURR1 feedback enabled

(default)

CURR2 feedback enabled

CURR6 feedback enabled

4:3

step_up_vmax

R/W

Overvoltage protection for the DCDC step up

16V

10V

25V

don’t use (15.5V)

Table 10. DCDC control2

Addr: 22h

DCDC control2

This register controls the Step Up DC/DC Converter and low-voltage current

sinks CURR3x.

Bit

Bit Name

Default Access

Description

skip_fast

0R/W

Step Up DC/DC Converter output voltage at low loads,

when pulse skipping is active

Accurate output voltage, more ripple

Elevated output voltage, less ripple

AS3677 датащи(PDF) 13 Page - ams AG

AS3677 датащи(HTML) 13 Page - ams AG

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

датащи скачать

ссылки URL