AS3668 datasheet(43/59 Pages) AMSCO

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AS3668

Data Sheet - Detailed Description

Table 42. Pattern Frame Start Delay Register

0x1c Pattern Frame Start Delay Register

Bit

Bit Name

Default

Access

Bit Description

7:6

frame_delay4

R/W

Defines the start delay of CURR4 in pattern generation mode. Note that

changes in this register are only getting active after a restart of the pattern

generation unit by toggling the pattern_enable bit.

00: No start delay for CURR4

01: 1 frame start delay for CURR4

10: 2 frames start delay for CURR4

11: 3 frames start delay for CURR4

5:4

frame_delay3

R/W

Defines the start delay of CURR3 in pattern generation mode. Note that

changes in this register are only getting active after a restart of the pattern

generation unit by toggling the pattern_enable bit.

00: No start delay for CURR3

01: 1 frame start delay for CURR3

10: 2 frames start delay for CURR3

11: 3 frames start delay for CURR3

3:2

frame_delay2

R/W

Defines the start delay of CURR2 in pattern generation mode. Note that

changes in this register are only getting active after a restart of the pattern

generation unit by toggling the pattern_enable bit.

00: No start delay for CURR2

01: 1 frame start delay for CURR2

10: 2 frames start delay for CURR2

11: 3 frames start delay for CURR2

1:0

frame_delay1

R/W

Defines the start delay of CURR1 in pattern generation mode. Note that

changes in this register are only getting active after a restart of the pattern

generation unit by toggling the pattern_enable bit.

00: No start delay for CURR1

01: 1 frame start delay for CURR1

10: 2 frames start delay for CURR1

11: 3 frames start delay for CURR1

Table 43. GPIO Toggle Control Register

0x1d GPIO Toggle Control Register

Bit

Bit Name

Default

Access

Bit Description

gpio_toggle_en

This bit enables the GPIO/AUDIO_IN pin to toggle after a defined number of

frames. The number of frames where the pin toggles is defined in register

gpio_toggle_framenr.

0: GPIO toggle disabled

1: GPIO toggle enabled

1:0

gpio_toggle_framenr

R/W

This register defines the number of frames where the GPIO/AUDIO_IN

toggles. The register setting is only active if gpio_toggle_en bit is enabled.

00: GPIO toggles after 1 frame

01: GPIO toggles after 2 frames

10: GPIO toggles after 3 frames

11: GPIO toggles after 4 frames

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