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AS1369

Datasheet

8.5 Explanation of Steady State Specifications

8.5.1 Line Regulation

Line regulation is defined as the change in output voltage when the input (or line) voltage is changed by a known quantity. It is a measure of the

regulator’s ability to maintain a constant output voltage when the input voltage changes. Line regulation is a measure of the DC open loop gain

of the error amplifier. More generally:

Line Regulation =

and is a pure number

(EQ 9)

available with numerous output voltage trim options.

Line Regulation =

% / V

(EQ 10)

8.5.2 Load Regulation

Load regulation is defined as the change of the output voltage when the load current is changed by a known quantity. It is a measure of the

regulator’s ability to maintain a constant output voltage when the load changes. Load regulation is a measure of the DC closed loop output

resistance of the regulator. More generally:

Load Regulation =

and is units of ohms (

)(EQ 11)

In practise, load regulation is referred to the regulator output voltage in terms of % / mA. This is particularly useful when the same regulator is

available with numerous output voltage trim options.

Load Regulation =

% / mA

(EQ 12)

8.5.3 Setting Accuracy

Accuracy of the final output voltage is determined by the accuracy of the ratio of R1 and R2, the reference accuracy and the input offset voltage

of the error amplifier. When the regulator is supplied pre-trimmed, the output voltage accuracy is fully defined in the output voltage specification.

When the regulator has a SET terminal, the output voltage may be adjusted externally. In this case, the tolerance of the external resistor network

must be incorporated into the final accuracy calculation. Generally:

(EQ 13)

The reference tolerance is given both at 25°C and over the full operating temperature range.

8.5.4 Total Accuracy

Away from dropout, total steady state accuracy is the sum of setting accuracy, load regulation and line regulation. Generally:

Total % Accuracy = Setting % Accuracy + Load Regulation % + Line Regulation %

(EQ 14)

8.6 Explanation of Dynamic Specifications

8.6.1 Power Supply Rejection Ratio (PSRR)

Known also as Ripple Rejection, this specification measures the ability of the regulator to reject noise and ripple beyond DC. PSRR is a

summation of the individual rejections of the error amplifier, reference and AC leakage through the series pass transistor. The specification, in

the form of a typical attenuation plot with respect to frequency, shows up the gain bandwidth compromises forced upon the designer in low

quiescent current conditions. Generally:

PSRR =

dB using lower case

to indicate AC values

(EQ 15)

Power supply rejection ratio is fixed by the internal design of the regulator. Additional rejection must be provided externally.

V

OUT

V

IN

-----------------

V

OUT

V

IN

-----------------

100

V

OUT

-------------



V

OUT

I

OUT

-----------------

V

OUT

I

OUT

-----------------

100

V

OUT

-------------



V

OUT

V



 1 R1 R1



R2

R2



---------------------

+





=

20Log

V

OUT

V

IN

-----------------

