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AS1324 датащи(PDF) 16 Page - ams AG |
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AS1324 датащи(HTML) 16 Page - ams AG |
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16 / 21 page ![]() www.ams.com/DC-DC_Step-Up/AS1324 Revision 1.06 16 - 21 AS1324 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 9.10 Layout Considerations The AS1324 requires proper layout and design techniques for optimum performance. The power traces (GND, SW, and VIN) should be kept as short, direct, and wide as is practical. Pin VFB (AS1324 only) should be connected directly to the feedback resistors (R1 and R2). A potentiometer as replacement for R1 and R2 should be avoided to minimize the output voltage ripple and to maintain the stability of the regulator. The resistive divider (R1/R2) must be connected between the positive plate of COUT and ground. The positive plate of CIN should be connected as close to VIN as is practical since CIN provides the AC current to the internal power MOS- FETs. Switching node SW should be kept far away from the sensitive VFB node. The negative plates of CIN and COUT should be kept as close to each other as is practical. A starpoint to Ground is recommended. Figure 29. AS1324 Basic PCB Layout Figure 30. AS1324 Basic Diagram 5 AS1324 4 3 2 1 Via to GND Via to VOUT VOUT SW GND VIN Via to VIN COUT CIN L1 R1 R2 CFWD AS1324 1 EN 4 VIN 3 SW 5 VFB 2 GND CIN L1 R1 R2 CFWD High Current Path VIN COUT VOUT |
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