PIC16F882-I datasheet(190/328 Pages) MICROCHIP

190 / 328 page

PIC16F882/883/884/886/887

DS41291F-page 188

13.3.6

SLEEP OPERATION

In Master mode, all module clocks are halted, and the

transmission/reception will remain in that state until the

device wakes from Sleep. After the device returns to

normal mode, the module will continue to transmit/

receive data.

In Slave mode, the SPI transmit/receive shift register

operates asynchronously to the device. This allows the

device to be placed in Sleep mode and data to be

shifted into the SPI transmit/receive shift register.

When all eight bits have been received, the MSSP

interrupt flag bit will be set and, if enabled, will wake the

device from Sleep.

13.3.7

EFFECTS OF A RESET

A Reset disables the MSSP module and terminates the

current transfer.

13.3.8

BUS MODE COMPATIBILITY

Table 13-1 shows the compatibility between the

standard SPI modes and the states of the CKP and

CKE control bits.

TABLE 13-1:

SPI BUS MODES

There is also a SMP bit that controls when the data will

be sampled.

TABLE 13-2:

REGISTERS ASSOCIATED WITH SPI OPERATION

Standard SPI Mode

Terminology

Control Bits State

CKP

CKE

, 00

, 10

, 01

, 11

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on

POR, BOR

Value on

all other

RESETS

INTCON

GIE/GIEH

PEIE/GIEL

T0IE

INTE

RBIE

T0IF

INTF

RBIF

0000 000x

0000 000u

PIE1

—

ADIE

RCIE

TXIE

SSPIE

CCP1IE

TMR2IE

TMR1IE

0000 0000

PIR1

—

ADIF

RCIF

TXIF

SSPIF

CCP1IF

TMR2IF

TMR1IF

-000 0000

0000 0000

SSPBUF

Synchronous Serial Port Receive Buffer/Transmit Register

xxxx xxxx

uuuu uuuu

SSPCON

WCOL

SSPOV

SSPEN

CKP

SSPM3

SSPM2

SSPM1

SSPM0

0000 0000

SSPSTAT

SMP

CKE

D/A

R/W

0000 0000

TRISA

TRISA7

TRISA6

TRISA5

TRISA4

TRISA3

TRISA2

TRISA1

TRISA0

1111 1111

TRISC

TRISC7

TRISC6

TRISC5

TRISC4

TRISC3

TRISC2

TRISC1

TRISC0

1111 1111

Legend:

= unknown, u = unchanged, – = unimplemented, read as ‘0’. Shaded cells are not used by the MSSP in SPI mode.

Note

Bit 6 of PORTA, LATA and TRISA are enabled in ECIO and RCIO Oscillator modes only. In all other oscillator modes, they are disabled and

read ‘0’.

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