поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

Preview PDF HTML

PIC16F882-I датащи(PDF) 115 Page - Microchip Technology

номер детали PIC16F882-I
подробное описание детали  28/40/44-Pin, Enhanced Flash-Based 8-Bit CMOS Microcontrollers
PDF  328 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC16F882-I датащи(HTML) 115 Page - Microchip Technology

Back Button PIC16F882-I Datasheet HTML 111Page - Microchip Technology PIC16F882-I Datasheet HTML 112Page - Microchip Technology PIC16F882-I Datasheet HTML 113Page - Microchip Technology PIC16F882-I Datasheet HTML 114Page - Microchip Technology PIC16F882-I Datasheet HTML 115Page - Microchip Technology PIC16F882-I Datasheet HTML 116Page - Microchip Technology PIC16F882-I Datasheet HTML 117Page - Microchip Technology PIC16F882-I Datasheet HTML 118Page - Microchip Technology PIC16F882-I Datasheet HTML 119Page - Microchip Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 115 / 328 page
background image
© 2009 Microchip Technology Inc.
DS41291F-page 113
PIC16F882/883/884/886/887
REGISTER 10-5:
EECON1: EEPROM CONTROL REGISTER
R/W-x
U-0
U-0
U-0
R/W-x
R/W-0
R/S-0
R/S-0
EEPGD
—
—
—
WRERR
WREN
WR
RD
bit 7
bit 0
Legend:
S = Bit can only be set
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
EEPGD: Program/Data EEPROM Select bit
1
= Accesses program memory
0
= Accesses data memory
bit 6-4
Unimplemented: Read as ‘0’
bit 3
WRERR: EEPROM Error Flag bit
1
= A write operation is prematurely terminated (any MCLR Reset, any WDT Reset during
normal operation or BOR Reset)
0
= The write operation completed
bit 2
WREN: EEPROM Write Enable bit
1
= Allows write cycles
0
= Inhibits write to the data EEPROM
bit 1
WR: Write Control bit
1
= Initiates a write cycle (The bit is cleared by hardware once write is complete. The WR bit can only
be set, not cleared, in software.)
0
= Write cycle to the data EEPROM is complete
bit 0
RD: Read Control bit
1
= Initiates a memory read (the RD is cleared in hardware and can only be set, not cleared, in
software.)
0
= Does not initiate a memory read



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com