ISD1964SYI datasheet(9/29 Pages) ETC2

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ISD1900

Publication Release Date: Jan 5, 2009

Revision 0.51

PIN NAME

PIN #

I / O

FUNCTION

SP+

Depending on the derivative selected, it could be:

SP+: Positive signal of the differential Class-D PWM speaker outputs. This

output, together with the SP-, is used to drive an 8Ω speaker directly.

Or,

AUX out: single-ended voltage output.

VSSP1

Ground: Ground for positive PWM speaker driver.

AGC

Automatic Gain Control (AGC): The AGC adjusts the gain of the

preamplifier dynamically to compensate for the wide range of microphone

input levels. The AGC allows the full range of signals to be recorded with

minimal distortion. The AGC is designed to operate with a nominal

capacitor of 4.7 µF connected to this pin.

Connecting this pin to ground (VSSA) provides maximum gain to the

preamplifier circuitry. Conversely, connecting this pin to the power supply

(VCCA) provides minimum gain to the preamplifier circuitry.

MIC+: Non-inverting input of the differential microphone signal.

MIC+ / AnaIn

AnaIn: When FT

¯¯ is selected, the MIC+ input is configured to a single-ended

input with 1Vp-p maximum input amplitude and feed-through to the speaker

outputs.

MIC- / NC

MIC-: Inverting input of the differential microphone signal. While FT

¯¯ is

enabled, MIC- pin is disabled and must be floated.

Rosc

Oscillator Resistor: Connect an external resistor from this pin to VSSA to

select the internal sampling frequency.

VCCA

Analog Power Supply: Power supply for analog circuits.

LED

¯¯¯¯

LED output: During recording, this output is Low. Also, LED

¯¯¯¯ pulses Low

momentarily at the end of playback.

PlayE

¯¯¯¯¯: In Address Mode, low active input, edge-trigger playback from start

to end addresses & toggle on-off. Debounce & internal pull-up existed.

PlayE

¯¯¯¯¯/FMC2

FMC2: When Direct Mode is active, FMC2, together with FMC1 & FMC3,

setup various fixed-message configurations.

REC

¯¯¯¯: In Address Mode, level-hold (after 1 sec holding) or edge-trigger

(toggle on-off), low active, recording from start to end addresses. Debounce

& internal pull-up existed.

REC

¯¯¯¯/ R

¯¯/P

¯¯/P ( When Direct Mode is active):

• When R

¯¯/P is set to Low, level-hold record operation is selected.

When R

¯¯/P is set to High, edge-trigger & toggle on-off playback operation is

selected.

External Clock: In Address Mode, low active and level-hold input. As XCLK

¯¯¯¯¯

activated, Rosc pin accepts external clock input signal, provided resistor at

Rosc must be removed. Connecting this pin to High enables device running

on internal clock via Rosc resistor. If not used, XCLK

¯¯¯¯¯ must be at high level.

XCLK

¯¯¯¯¯/FMC3

When Direct Mode is active, FMC3, together with FMC1 & FMC2, setup

various fixed-message configurations.

¯¯

Feed-Through: Low active input, Level-hold, debounce & Internal pull-up

required. When FT

¯¯ is selected, the MIC+ input is configured to a single-

ended input with 1Vp-p maximum input amplitude and feed-through to the

speaker outputs.

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